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SH7018 Folha de dados(PDF) 83 Page - Renesas Technology Corp

Nome de Peças SH7018
Descrição Electrónicos  SuperH??RISC engine
PDF  431 Pages
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7018 Folha de dados(HTML) 83 Page - Renesas Technology Corp

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67
IPRA to IPRH are initialized to H'0000 by a power-on reset. Reserved bits are always read as 0.
The write value should always be 0. It is not initialized in the standby mode.
6.3.2
Interrupt Control Register (ICR)
The ICR is a 16-bit register that sets the input signal detection mode of the external interrupt input
pin NMI and
IRQ0 to IRQ3, IRQ6, IRQ7 and indicates the input signal level to the NMI pin.
A power-on reset initializes ICR. It is not initialized in the standby mode.
Bit:
15
14
13
12
11
10
9
8
NMIL
—
—
—
—
—
—
NMIE
Initial value:
*
00
00
0
00
R/W:
R
R
R
R
R
R
R
R/W
Bit:
7
6
5
4
3
2
1
0
IRQ0S
IRQ1S
IRQ2S
IRQ3S
—
—
IRQ6S
IRQ7S
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R
R
R/W
R/W
Note: * When NMI input is high: 1; when NMI input is low: 0
• Bit 15—NMI Input Level (NMIL): Sets the level of the signal input at the NMI pin. This bit
can be read to determine the NMI pin level. This bit cannot be modified.
Bit 15: NMIL
Description
0
NMI input level is low
1
NMI input level is high
• Bits 14 to 9—Reserved: These bits are always read as 0. The write value should always be 0.
• Bit 8—NMI Edge Select (NMIE)
Bit 8: NMIE
Description
0
Interrupt request is detected on falling edge of NMI input (Initial value)
1
Interrupt request is detected on rising edge of NMI input



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