HS4318ESS01H datasheet(13/68 Pages) RENESAS

Nome de Peças	HS4318ESS01H

Descrição Electrónicos	microcomputer designed to increase program productivity

PDF	68 Pages

Scroll/Zoom	100%

Fabricante Electrônico	RENESAS [Renesas Technology Corp]

Página de início	http://www.renesas.com

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13 / 68 page

HD404318 Series

IAOF

ICSF

ICEF

RAME

RSP

WDON

ADSF

Not used

SEM/SEMD

Allowed

Not executed

Allowed

Not executed

Allowed

REM/REMD

Allowed

Not executed

Inhibited

Not executed

TM/TMD

Allowed

Inhibited

Allowed

Inhibited

Note:

WDON is reset by MCU reset or by

STOPC enable for stop mode cancellation. The REM or REMD

instruction must not be executed for ADSF during A/D conversion. If the TM or TMD instruction is

executed for the inhibited bits or non-existing bits, the value in ST becomes invalid.

Figure 4 Usage Limitations of RAM Bit Manipulation Instructions

Memory registers

$040

$041

$042

$043

$044

$045

$046

$047

$048

$049

$04A

$04B

$04C

$04D

$04E

$04F

$3C0

$3FF

MR(0)

MR(1)

MR(2)

MR(3)

MR(4)

MR(5)

MR(6)

MR(7)

MR(8)

MR(9)

Level 16

Level 15

Level 14

Level 13

Level 12

Level 11

Level 10

Level 9

Level 8

Level 7

Level 6

Level 5

Level 4

Level 3

Level 2

Level 1

MR(10)

MR(11)

MR(12)

MR(13)

MR(14)

MR(15)

Bit 3

Bit 2

Bit 1

Bit 0

PC –PC :

ST: Status flag

CA: Carry flag

Program counter

Stack area

$3FC

$3FD

$3FE

$3FF

Figure 5 Configuration of Memory Registers and Stack Area, and Stack Position

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