HS4318ESS01H datasheet(11/68 Pages) RENESAS

11 / 68 page

HD404318 Series

RAM MemoryMap

A/D channel register

(ACR)

$000

$040

$050

$003

$004

$005

$006

$007

$008

$009

$00A

$00B

$00C

$00D

$00E

$00F

$020

$023

$033

$034

$00A

$00B

$00E

$00F

R/W

$3C0

RAM-mapped registers

Memory registers (MR)

Stack (64 digits)

Interrupt control bits area

Port mode register A

(PMRA)

Serial mode register

(SMR)

Serial data register lower (SRL)

Serial data register upper (SRU)

Timer mode register A

(TMA)

Timer mode register B1 (TMB1)

Timer B

(TRBL/TWBL)

(TRBU/TWBU)

Miscellaneous register

(MIS)

Timer mode register C

(TMC)

Timer C

(TRCL/TWCL)

(TRCU/TWCU)

Port R0 DCR

(DCR0)

Port R3 DCR

(DCR3)

Not used

1. Two registers are mapped

on the same area ($00A,

$00B, $00E, $00F).

2. Undefined.

Timer read register B lower (TRBL)

Timer read register B upper (TRBU)

Timer read register C lower (TRCL)

Timer read register C upper (TRCU)

Timer write register B lower (TWBL)

Timer write register B upper (TWBU)

Timer write register C lower (TWCL)

Timer write register C upper (TWCU)

R: Read only

W: Write only

R/W: Read/write

$180

Notes:

$016

A/D data register lower

(ADRL)

$017

$024

$025

$026

$018

$019

$01A

$3FF

A/D data register upper (ADRU)

A/D mode register 1

(AMR1)

A/D mode register 2

(AMR2)

Port mode register B

(PMRB)

Port mode register C

(PMRC)

Timer mode register B2

(TMB2)

Not used

Port R4 DCR

(DCR4)

$030

Data (304 digits)

Not used

-000

0000

Undefined

-000

0000

*2/0000

00--

0000

1000

0000

--00

0000

00-0

-000

0000

Undefined

*2/0000

Undefined

Initial values

after reset

$03F

Figure 2 RAM Memory Map and Initial Values

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