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ADE3800SXL Folha de dados(PDF) 36 Page - STMicroelectronics

Nome de Peças ADE3800SXL
Descrição Electrónicos  Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters
PDF  138 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
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ADE3800SXL Folha de dados(HTML) 36 Page - STMicroelectronics

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Register Description by Block
ADE3800
36/138
4.7
Input Sync Measurement (SMEAS)
The SMEAS block monitors input activity and measures input sync signals from all sources. All
unused and reserved bits return as zero. SMEAS operates in the crystal clock (xclk) domain.
Input Sync Functions:
● Activity Detection: detects input activity
● Measurement: measures sync period and width
4.7.1
Input Sync - Activity Detection
The activity block measures all sync sources in parallel. An active channel is defined as having a
programmable number of rising edges within a programmable number of xclk cycles (= sample
period). Activity limits are set per channel class: clkdiv1k and HSync; vsync. The activity results are
updated each sample period.
Software can select either:
● One shot: one time measurement
● Free Run: continuously running measurements
Figure 7: VSync Up/Down Counter
Composite
Sync
H Pulse
V Pulse
1/8
1/4
3/4
7/8
Threshold
UP
UP
DOWN
DOWN
OK: good
if V Pulse width was too short for the chosen threshold
(counter reaches 3/4th but goes down before 7/8th is reached):
Bad sync bit SRT_VS_SEL[3] would be set
threshold
Extracted
VSync
up at 7/8
down at 1/8
BAD SYNC AREA
0
error



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