ST6375 datasheet(30/84 Pages) STMICROELECTRONICS

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ST6365, ST6375, ST6385 ST6367, ST6377, ST6387

I/O PORTS (Cont’d)

4.1.2 I/O Pin Programming

Each pin can be individually programmed as input

or output with different input and output configura-

tions. This is achieved by writing to the relevant bit

in the data (DR) and data direction register (DDR).

Table 10 shows all the port configurations that can

be selected by the user software.

4.1.3 Input/Output Configurations

The Table 9 shows the I/O lines hardware configu-

ration for the different options.

Notes: The WAIT instruction allows the ST638x to

be used in situations where low power consump-

tion is needed. This can only be achieved however

if the I/O pins either are programmed as inputs

with well defined logic levels or have no power

consuming resistive loads in output mode. As the

same die is used for the different ST638x versions

the unavailable I/O lines of ST638x should be pro-

grammed in output mode.

Single-bit operations on I/O registers are possible

but care is necessary because reading in input

mode is made from I/O pins while writing will di-

rectly affect the Port data register causing an un-

desired changes of the input configuration.

Table 10. I/O Port Options Selection (Port C)

Note: X. Means don’t care.

4.1.4 I/O Port Registers

4.1.4.1 Data Registers

Ports A, B, C Data Register

Address: C0h (PA), C1h (PB), C2h (PC) - Read/

Write

Reset Value: 00h

PA7-PA0. These are the I/O port A data bits. Re-

set at power-on.

PB7-PB0. These are the I/O port B data bits. Re-

set at power-on.

PC7-PC0. Set to 04h at power-on. Bit 2 (PC2 pin)

is set to one (open drain therefore high imped-

ance).

4.1.4.2 Data Direction Registers

Port A, B, C Data Direction Register

Address: C4h (PA), C5h (PB), C6h (PC) - Read/

Write

Reset value:00h

PA7-PA0. These are the I/O port A data direction

bits. When a bit is cleared to zero the related I/O

line is in input mode, if bit is set to one the related

I/O line is in output mode. Reset at power-on.

PB7-PB0. These are the I/O port B data direction

bits. When a bit is cleared to zero the related I/O

line is in input mode, if bit is set to one the related

I/O line is in output mode. Reset at power-on.

PC7-PC0. These are the I/O port C data direction

bits. When a bit is cleared to zero the related I/O

line is in input mode, if bit is set to one the related

I/O line is in output mode. Set to 04h at power-on.

Bit 2 (PC2 pin) is set to one (output mode select-

ed).

DDR

Mode

Option

Input

With on-chip pull-up resistor

Input

Without on-chip pull-up resistor

Output

Open-drain

PA/

PB/

PC7

PA/

PB/

PC6

PA/

PB/

PC5

PA/

PB/

PC4

PA/

PB/

PC3

PA/

PB/

PC2

PA/

PB/

PC1

PA/

PB/

PC0

PA/

PB/

PC7

PA/

PB/

PC6

PA/

PB/

PC5

PA/

PB/

PC4

PA/

PB/

PC3

PA/

PB/

PC2

PA/

PB/

PC1

PA/

PB/

PC0

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