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AS1545 Folha de dados(PDF) 29 Page - ams AG |
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AS1545 Folha de dados(HTML) 29 Page - ams AG |
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29 / 34 page ![]() www.austriamicrosystems.com Revision 1.00 29 - 34 AS1545 Data Sheet - A p p l i c a t i o n I n f o r m a t i o n Figure 52. Reading Data from Both ADCs on One DOUT Line with 32 SCLKs Figure 53. 32 SCLKs Data transfer for all modes in DOUTA, DOUTB Difference calculator and quadrature signals calculator The AS1545 internally calculates the difference between the output codes of ADC A and ADC B. There are several requirements that need to be taken into account in order to work with the difference calculator. First off, the output data of both ADCs needs to be in straight binary coding. This means that the difference calculator will only give the correct results in single ended and pseudo differential modes. Also, it is important to note that in order to read the data from the difference calculator we must read all 32 bits of data of the ADC, therefore reducing the overall sampling rate of the ADC by half. The difference calculator will always give you a 13 bit two’s complement result. The first bit is the sign of the operation and the next 12 bits are the data. For simplicity in the design, an systematic error of 1 LSB can be expected from the difference calculator. Below we have an detailed example describing the operation of the difference calculator. Let’s assume that VINA = 1.667V VINB = 2V VREF = 2.5V and we are working in single ended mode. DOUT_A = 1010 1010 1010 or 2730 in decimal DOUT_B = 1100 1100 1100 or 3276 in decimal The difference should be 2730-3276=-546 in decimal In 2’s complement -546 is 1 1101 1101 1110 in binary. This is a 1 for the minus sign plus 4096-546=3550 in decimal which corresponds to 1101 1101 1110 in binary As stated before, there is a -1LSB error in the operation so the actual output should be -547 in decimal which corresponds to 1 1101 1101 1101 in binary which is the result that the difference calculator clocks out. 1 2 3 4 5 tCH 0 0 0 DB11A DB10A 0 0 0 THREE- STATE 3 LEADING ZEROES THREE- STATE DOUTA SCLK CSN tCSS 18 tCL tDOH tCSDOE 32 15 16 17 0 DB11B DB0B 0 tDOD 1 TRAILING ZERO 3 LEADING ZEROES 1 TRAILING ZERO tDOV 000 SDATA_A 00 0+SDATA_B 0 000 SDATA_A Counter + DIR + A + B 0 000 SDATA_A DIF 0 DOUTA CSN DOUTA* DOUTB * only applicable when SGL/DIFF = 0 ; Α2=1, Α1=1, Α0=0 0 00 0 00 0 16bit 16bit |
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