33/39

M50FW002

Figure 17. Chip Erase Flowchart and Pseudo Code (A/A Mux Interface Only)

Note: 1. If an error is found, the Status Register must be cleared before further Program/Erase Controller operations.

Write 80h

AI04195

Start

Write 10h

Read Status

Register

YES

NO

b7 = 1

YES

NO

b3 = 0

NO

b4, b5 = 0

VPP Invalid

Error (1)

Command

Sequence Error (1)

Chip Erase command:

– write 80h

– write 10h

(memory enters read Status Register after

the Chip Erase command)

do:

– read Status Register

while b7 = 1

If b3 = 1, VPP invalid error:

– error handler

If b4, b5 = 1, Command sequence error:

– error handler

YES

NO

b5 = 0

Erase Error (1)

If b5 = 1, Erase error:

– error handler

End

YES