Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

Preview PDF HTML

MPC8309CVMADFC Folha de dados(PDF) 70 Page - NXP Semiconductors

Nome de Peças MPC8309CVMADFC
Descrição Electrónicos  PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
PDF  81 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  NXP [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPC8309CVMADFC Folha de dados(HTML) 70 Page - NXP Semiconductors

Back Button MPC8309CVMADFC Datasheet HTML 66Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 67Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 68Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 69Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 70Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 71Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 72Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 73Page - NXP Semiconductors MPC8309CVMADFC Datasheet HTML 74Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 70 / 81 page
background image
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3
70
Freescale Semiconductor
Clocking
NOTE
Core VCO frequency = core frequency
 VCO divider. The VCO divider
(RCWL[COREPLL[0:1]]), must be set properly so that the core VCO
frequency is in the range of 400–800 MHz.
23.6
QUICC Engine PLL Configuration
The QUICC Engine PLL is controlled by the RCWL[CEPMF] and RCWL[CEPDF] parameters. The
following table shows the multiplication factor encodings for the QUICC Engine PLL.
The RCWL[CEVCOD] denotes the QUICC Engine PLL VCO internal frequency as shown in the
following table.
01
0011
0
3:1
 4
10
0011
0
3:1
 8
11
0011
0
3:1
 8
Table 61. QUICC Engine PLL Multiplication Factors
RCWL[CEPMF]
RCWL[CEPDF]
QUICC Engine PLL Multiplication Factor = RCWL[CEPMF]/
(1 + RCWL[CEPDF)
00000–00001
0
Reserved
00010
0
 2
00011
0
 3
00100
0
 4
00101
0
 5
00110
0
 6
00111
0
 7
01000
0
 8
01001–11111
0
Reserved
Table 62. QUICC Engine PLL VCO Divider
RCWL[CEVCOD]
VCO Divider
00
2
01
4
10
8
11
Reserved
Table 60. e300 Core PLL Configuration (continued)
RCWL[COREPLL]
core_clk : csb_clk Ratio
VCO Divider
0-1
2-5
6



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81


Folha de dados Download

Go To PDF Page


Ligação URL



ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   Link para a ficha técnica    |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com