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STM32F101X6 Folha de dados(PDF) 61 Page - STMicroelectronics

Nome de Peças STM32F101X6
Descrição Electrónicos  Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
PDF  74 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101X6 Folha de dados(HTML) 61 Page - STMicroelectronics

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STM32F101xx
Electrical characteristics
61/74
Figure 28.
Typical connection diagram using the ADC
1.
Refer to Table 41 for the values of RAIN, RADC and CADC.
2.
CPARASITIC must be added to CAIN. It represents the capacitance of the PCB (dependent on soldering and
PCB layout quality) plus the pad capacitance (3 pF). A high CPARASITIC value will downgrade conversion
accuracy. To remedy this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 29 or Figure 30,
depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 29.
Power supply and reference decoupling (VREF+ not connected to VDDA)
1.
VREF+ and VREF- inputs are available only on 100-pin packages.
ai14139b
STM32F101
VDD
AINx
IL±1 µA
0.6 V
VT
RAIN(1)
CAIN
VAIN
0.6 V
VT
RADC(1)
12-bit A/D
conversion
CADC(1)
V REF+
STM32F101xx
V DDA
V SSA/V REF-
1 µF // 10 nF
1 µF // 10 nF
ai14380



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