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FS26 Folha de dados(PDF) 44 Page - NXP Semiconductors |
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FS26 Folha de dados(HTML) 44 Page - NXP Semiconductors |
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44 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B 16.2 Main register mapping 16.2.1 M_DEVICEID Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read FULL_LAYER_REV[2:0] METAL_LAYER_REV[2:0] FAM_ID[3:0] DEV_ID[5:0] Reset 0 1 1 0 0 1 0 1 1 1 OTP OTP OTP OTP OTP OTP Table 16. M_DEVICEID register bit allocation Go to main register map Bit Symbol Value Description Full layer mask revision 3h Pass C silicon for A release version 1h Pass A silicon for H release version 15 to 13 FULL_LAYER_REV[2:0] Reset condition: N/A Metal mask revision 1h Rev X.1 for A release version 0h Rev X.0 for H release version 12 to 10 METAL_LAYER_REV[2:0] Reset condition: N/A Device family Identification 7h FS26 family. Defined on metal mask. 9 to 6 FAM_ID[3:0] Reset condition: N/A Device ID FS26 version dependent. See Table 1 5 to 0 DEV_ID[5:0] Reset condition: N/A Table 17. M_DEVICEID register bit description 16.2.2 M_PROGID Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read PROG_IDH[7:0] PROG_IDL[7:0] Reset OTP OTP Table 18. M_PROGID register bit allocation Go to main register map Bit Symbol Description Higher byte to set the first letter for the OTP ID code (see Table 96) PROG_IDH_OTP[7:0] 15 to 8 PROG_IDH[7:0] Reset condition: N/A Lower byte to set the second letter for OTP ID code (see Table 97) PROG_IDL_OTP[7:0] 7 to 0 PROG_IDL[7:0] Reset condition: N/A Table 19. M_PROGID register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 44 / 156 |
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