UCD3138A64 datasheet(63/84 Pages) TI2

63 / 84 page

3 A – QB1

( DPWM1C )

3 B – QT1

( DPWM2 C)

2 B – QB2

( EDGEGEN )

2 A – QT 2

( EDGEGEN)

0 B –

QSYN 2,4

1 B –

QSYN 1 ,3

Transformer

Voltage

X1 , X2 , X 3 and Y1 , Y2 , Y 3

are sets of moving edges

All other edges are fixed .

DPWM 2 AF

DPWM 2 BF

DPWM3 AF

DPWM3 BF

Current

Peak Level

UCD3138128, UCD3138A64

www.ti.com

SLUSBZ8B – JUNE 2014 – REVISED FEBRUARY 2017

Product Folder Links: UCD3138128 UCD3138A64

Submit Documentation Feedback

Here is an overview of the key PSFB signals:

Figure 39. Key PSFB Signals

10.2.2.3 DPWM Synchronization

DPWM1 is synchronized to DPWM0, DPWM2 is synchronized to DPWM1, and DPWM3 is synchronized to

DPWM2, ½ period out of phase using these commands:

Dpwm1Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; //configured to slave

Dpwm2Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; // configured to slave

Dpwm3Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; // configured to slave

Dpwm0Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC;

Dpwm1Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC;

Dpwm2Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC;

LoopMuxRegs.DPWMMUX.bit.DPWM1_SYNC_SEL = 0;

LoopMuxRegs.DPWMMUX.bit.DPWM2_SYNC_SEL = 1;

LoopMuxRegs.DPWMMUX.bit.DPWM3_SYNC_SEL = 2;

// Slave to dpwm-0

// Slave to dpwm-1

// Slave to dpwm-2

If the event registers on the DPWMs are the same, the two pairs of signals will be symmetrical. All code

examples are taken from the PSFB EVM code, unless otherwise stated.

UCD3138A64 Folha de dados(PDF) 63 Page - Texas Instruments

UCD3138A64 Folha de dados(HTML) 63 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

Folha de dados Download

Ligação URL