UCD3138064ARGCR datasheet(13/84 Pages) TI2

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UCD3138064A

www.ti.com

SLUSCA5B – DECEMBER 2015 – REVISED JANUARY 2017

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Specifications

Electrical Characteristics (continued)

V33A = V33D = V33DIO = 3V to 3.6 V; 1μF from BP18 to DGND, TJ = –40 °C to 125 °C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

(2)

DPWM outputs are low after reset. Other GPIO pins are configured as inputs after reset. During power up or power down, all GPIO pins

output low.

(3)

The maximum total current, IOHmax and IOLmax for all outputs combined, should not exceed 12 mA to hold the maximum voltage drop

specified. Maximum sink current per pin = –6 mA at VOL; maximum source current per pin = 6 mA at VOH.

(4)

Time from close of error ADC sample window to time when digitally calculated control effort (duty cycle) is available. This delay, which

has no variation associated with it, must be accounted for when calculating the system dynamic response.

ADC12 INL integral nonlinearity, end

point (1)

ADC_SAMPLING_SEL = 6 for all ADC12 data,

25 to 125 °C

–3.9

–2/+2

4.5

LSB

ADC12 INL integral nonlinearity, best fit

–2.4

–1.5/+1

2.9

LSB

ADC12 DNL differential nonlinearity (1)

–0.8/+2

LSB

ADC Zero Scale Error

–7

ADC Full Scale Error

–35

Input bias

2.5 V applied to pin

200

Input leakage resistance (1)

ADC_SAMPLING_SEL= 6 or 0

Ω

Input Capacitance (1)

ADC single sample conversion time

3.744

μs

DIGITAL INPUTS/OUTPUTS (2)

VOL

Low-level output voltage (3)

IOH = 4 mA, V33DIO = 3 V

DGND

+ 0.25

VOH

High-level output voltage (3)

IOH = –4 mA, V33DIO = 3 V

V33DIO

– 0.6

VIH

High-level input voltage

V33DIO = 3 V

2.1

VIL

Low-level input voltage

V33DIO = 3 V

1.1

IOH

Output sinking current

IOL

Output sourcing current

–4

VOL(PMB

us)

Low-level output voltage for PMBus pins

(PMBUS_CLK, PMBUS_DATA,

PMBUS_ALERT, PMBUS_CTRL)

IOL = 20 mA

400

SYSTEM PERFORMANCE

tWD

Watchdog timeout resolution

13.1

22.7

Processor master clock (MCLK)

31.25

MHz

tDelay

Digital filter delay (4)

(1 clock = 32 ns)

6 MCLKs

Retention period of flash content (data

retention and program)

TJ = 25 °C

100

years

f(PCLK)

Internal oscillator frequency

–40 C to +125 C

240

250

260

MHz

–5 C to +85 C

245

250

255

MHz

f(LFO)

Internal low frequency oscillator

frequency

MHz

Flash Read

MCLKs

ISHARE

Current share current source (See

Figure 6-25)

238

259

μA

RSHARE Current share resistor (See Figure 6-25)

9.75

10.3

kΩ

POWER ON RESET AND BROWN OUT (V33A PIN, SEE Figure 5-4)

VGH

Voltage Good High

2.6

VGL

Voltage Good Low

2.55

Vres

(1)

Voltage at which IReset signal is valid(1)

0.8

Brownout

Internal signal warning of brownout conditions

2.9

TEMPERATURE SENSOR (1)

VTEMP

Voltage range of sensor

1.46

2.44

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