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Os motores de busca de Datasheet de Componentes eletrônicos |
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SPC570S40E1CXXXR Folha de dados(PDF) 9 Page - STMicroelectronics |
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SPC570S40E1CXXXR Folha de dados(HTML) 9 Page - STMicroelectronics |
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9 / 75 page  DocID024492 Rev 7 9/75 SPC570S40Ex, SPC570S50Ex Introduction 74 1.3 Feature overview On-chip modules within the SPC570Sx include the following features: • 2 main CPUs, single-issue, 32-bit CPU core complexes (e200z0h), running in lockstep – Power Architecture embedded specification compliance – Instruction set enhancement allowing variable length encoding (VLE), encoding a mix of 16-bit and 32-bit instructions, for code size footprint reduction • Up to 544 KB (512 KB code + 32 KB data, suitable for EEPROM emulation) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation • Up to 48 KB on-chip general-purpose SRAM • Multi-channel direct memory access controller (eDMA paired in lockstep) – 16 channels per eDMA • Interrupt controller (INTC) with dedicated interrupt source channels, including software interrupts and 32 priority levels • Dual phase-locked loops with stable clock domain for peripherals and frequency modulation domain for computational shell • Crossbar switch architecture for concurrent access to peripherals, flash memory, or SRAM from multiple bus masters with end-to-end ECC • System integration unit lite (SIUL2) • Boot Assist Flash (BAF) supports factory programming using serial bootload through ‘UART Serial Boot Mode Protocol’. Physical Interface (PHY) can be –UART / LIN –CAN • Enhanced analog-to-digital converter system – 2 separate 12-bit SAR analog converters – 1.5 µs conversion time (at 12 MHz) – 16 physical channels • Temperature sensor – Range −40 to +150 °C – Sensitivity approximately 5.14 mV/°C • STCU2 – Support for Logic BIST and Memory BIST at power on –ASIL D • 3 deserial serial peripheral interface (DSPI) modules • 2 LIN and UART communication interface (LINFlexD) modules – LINFlexD_0 (master/slave) – LINFlexD_1 (master) • Up to 2 FlexCAN modules • Nexus development interface (NDI) per IEEE-ISTO 5001-2003 standard, with partial support for 2010 standard • Device and board test support per Joint Test Action Group (JTAG) (IEEE 1149.1) • On-chip voltage regulator controller manages the supply voltage down to 1.2 V for core logic |
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