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ADA4177-2ARZ-R7 Folha de dados(PDF) 30 Page - Analog Devices |
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ADA4177-2ARZ-R7 Folha de dados(HTML) 30 Page - Analog Devices |
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30 / 33 page ![]() ADA4177-1/ADA4177-2/ADA4177-4 Data Sheet Rev. E | Page 30 of 33 The ADA4177-1/ADA4177-2/ADA4177-4 have extremely low long-term drift, as shown in Figure 97. The red, blue, and green traces show sample units. Note that the ADA4177-1/ADA4177-2/ ADA4177-4 have a mean drift over 10,000 hours of less than 2 µV, or 2% of their maximum specified offset voltage of 60 µV at room temperature. TIME (Hours) –8 –6 –4 –2 0 2 4 6 8 MEAN MEAN PLUS ONE STANDARD DEVIATION MEAN MINUS ONE STANDARD DEVIATION VSY = 10V 27 UNITS TA = 25°C SAMPLE 1 SAMPLE 2 SAMPLE 3 Figure 97. Measured Long-Term Drift of the ADA4177-1/ADA4177-2/ ADA4177-4 Offset Voltage over 10,000 Hours TEMPERATURE HYSTERESIS In addition to stability over time as described in the Long-Term Drift section, it is useful to know the temperature hysteresis, that is, the stability vs. cycling of temperature. Hysteresis is an important parameter because it tells the system designer how closely the signal returns to its starting amplitude after the ambient temperature changes and subsequent return to room temperature. Figure 98 shows the change in input offset voltage as the temperature cycles three times from room temperature to +125°C to −40°C and back to room temperature. The dotted line is an initial preconditioning cycle to eliminate the original temperature induced offset shift from exposure to production solder reflow temperatures. In the three full cycles, the offset hysteresis is typically only 2 µV, or less than 2% of its 120 µV maximum offset voltage over the full operating temperature range. The histogram in Figure 99 shows that the hysteresis is larger when the device is cycled through only a half cycle, from room temperature to hot 125°C and back to room temperature. TEMPERATURE (°C) –40 –20 0 20 40 60 80 100 120 –80 –60 –20 –40 0 20 40 60 80 VSY = 10V PRECONDITION CYCLE 1 CYCLE 2 CYCLE 3 Figure 98. Change in Offset Voltage over Three Full Temperature Cycles OFFSET VOLTAGE HYSTERESIS (µV) 0 40 30 50 35 45 25 20 15 10 5 0 40 30 50 35 45 25 20 15 10 5 –18 –15 –12 –9 –6 –3 0 3 6 9 12 15 18 VSY = 10V 27 UNITS × 3 CYCLES HALF CYCLE = +26°C, +125°C, +26°C FULL CYCLE = +26°C, +125°C, +26°C, –40°C, +26°C HALF CYCLE FULL CYCLE Figure 99. Histogram Showing the Temperature Hysteresis of the Offset Voltage over Three Full Cycles and over Three Half Cycles |
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