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ADA4177-2ARZ-R7 Folha de dados(PDF) 27 Page - Analog Devices

Nome de Peças ADA4177-2ARZ-R7
Descrição Electrónicos  OVP and EMI Protected, Precision, Low Noise and Bias Current Op Amps
PDF  33 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADA4177-2ARZ-R7 Folha de dados(HTML) 27 Page - Analog Devices

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Data Sheet
ADA4177-1/ADA4177-2/ADA4177-4
Rev. E | Page 27 of 33
J1A, J1B, J2A, and J2B are depletion mode junction field effect
transistors (JFETs) that replace the series resistance in the
conventional protection scheme. Under normal operation, the
input bias current of the ADA4177-1/ADA4177-2/ADA4177-4
flows through the J1A and J2A transistors without pinching off
the channel. To achieve excellent noise performance, J1A and
J2A must have a low on resistance (RDSON) of approximately 300 Ω.
When either input exceeds the rail by more than a diode, large
currents flow through either J1A or J2A, which causes the
channels to pinch off and effectively raises their resistance.
Figure 88 shows the positive overvoltage and negative
overvoltage characteristics as the FET channel pinches.
12
–10
–8
–6
–4
–2
0
2
4
6
8
10
VIN (V)
–50
50
30
10
–10
–30
VSY = ±15V
Figure 88. Input Bias Current During Positive and Negative Overvoltage,
VSY = ±15 V, Voltage Follower Configuration
Figure 89 shows how the JFET effective resistance increases
exponentially as shown by the measurements at 2 V, 20 V, and
40 V overvoltage. As the overvoltage increases from 2 V to 40 V,
the resistance increases from 300 Ω to 3.5 kΩ (a factor of 11).
10
–2
0
2
4
6
8
VIN (V)
2.5
42.5
32.5
37.5
27.5
22.5
17.5
12.5
7.5
300Ω AT 2V
2.2kΩ
AT 20V
3.5kΩ AT 40V
Figure 89. Overvoltage vs. Input Voltage (VIN), Voltage Follower
Configuration
LIMITING OVERVOLTAGE CURRENT OUT OF THE
POSITIVE SUPPLY PIN
Because the positive power supply of the system can be incapable
of sinking the large overvoltage current of 8 mA (see Figure 88),
care was taken to divide down this current into the positive rail
during an overvoltage event. As shown in Figure 90, Q1L is a
lateral PNP transistor that serves two purposes. First, the emitter
base acts as a clamping diode to route the overvoltage current
away from the V+ pin and to the V− pin. Second, it divides
down this current via the beta of Q1L. At an emitter current of
8 mA, the beta of Q1L is approximately 8, which reduces the
current injected into the positive supply by a factor of 8.
J1B
J1A
+IN
V+
Q1L
V–
Figure 90. Overvoltage Protection Circuitry
Figure 91 shows the positive and negative supply currents when
the input voltage exceeds the supply voltages (and overvoltage
condition). The current at the V+ terminal does not reverse
direction during an overvoltage event because the current is
directed to V− via the collector of Q1L.
8
–12
–10
–8
–6
–4
–2
0
4
6
2
INPUT DIFFERENTIAL (V)
–40
40
30
20
10
0
–10
–20
–30
POSITIVE SUPPLY CURRENT
NEGATIVE SUPPLY CURRENT
Figure 91. Supply Current vs. Input Differential, Circuit Configured at
Unity Gain with V+ = +15 V and V− = −15 V
If negative overvoltage transients are expected, ensure that the
negative voltage source driving V− can handle sourcing current
without forcing current into the device and causing the supply
voltage to change.



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