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IA188EM-PQF100I-R Folha de dados(PDF) 57 Page - InnovASIC, Inc

Nome de Peças IA188EM-PQF100I-R
Descrição Electrónicos  8/16-Bit Microcontrollers
PDF  133 Pages
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Fabricante Electrônico  INNOVASIC [InnovASIC, Inc]
Página de início  http://www.innovasic.com
Logo INNOVASIC - InnovASIC, Inc

IA188EM-PQF100I-R Folha de dados(HTML) 57 Page - InnovASIC, Inc

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IA186EM/IA188EM
Data Sheet
8/16-BIT Microcontrollers
As of Production Version -03
3737 Princeton NE, Ste 130 • Albuquerque, NM 87107 • Tel 505.883.5263 • Fax 505.883.5477 • www.Innovasic.com
Figure 4. DMA Unit
DMA Priority
DMA transfers have a higher priority than CPU transfers, with the exception of word accesses to odd
memory locations or between locked memory addresses. The CPU cannot access memory during a DMA
transfer and a DMA transfer cannot be suspended by an interrupt request. Continuous DMA activity will
thus cause interrupt latency to suffer. However, an NMI request halts any DMA activity, enabling the
CPU to respond promptly to the request.
20-bit Adder/Subtractor
Adder Control
Logic
Transfer Counter Ch. 1
Destination Address Ch. 1
Source Address Ch. 1
Transfer Counter Ch. 0
Destination Address Ch. 0
Source Address Ch. 0
DMA
Control
Logic
20
Request
Selection
Logic
Interrupt
Request
Timer Request
Channel Control Register 1
Channel Control Register 0
20
16
Internal Address/Data Bus
drq1
drq0



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