AM29SL400CB100REF datasheet(5/44 Pages) AMD

5 / 44 page

January 23, 2007 Am29SL400C_00_A6

Am29SL400C

D A TA

SH EE T

TABLE OF CONTENTS

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5

Special Handling Instructions for FBGA Packages 6

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 9

Table 1. Am29SL400C Device Bus Operations ............9

Word/Byte Configuration ........................................ 9

Requirements for Reading Array Data ................... 9

Writing Commands/Command Sequences ............ 9

Program and Erase Operation Status .................. 10

Standby Mode ...................................................... 10

Automatic Sleep Mode ......................................... 10

RESET#: Hardware Reset Pin ............................. 10

Output Disable Mode ............................................ 10

Table 2. Am29SL400CT Top Boot Block

Sector Address Table ..................................................11

Table 3. Am29SL400CB Bottom Boot Block

Sector Address Table ..................................................11

Autoselect Mode ................................................... 11

Table 4. Am29SL400C Autoselect Codes

(High Voltage Method) ................................................12

Sector Protection/Unprotection ............................ 12

Temporary Sector Unprotect ................................ 12

Figure 2. Temporary Sector Unprotect Operation....... 14

Hardware Data Protection .................................... 14

Command Definitions . . . . . . . . . . . . . . . . . . . . . 15

Reading Array Data .............................................. 15

Reset Command .................................................. 15

Autoselect Command Sequence .......................... 15

Word/Byte Program Command Sequence ........... 15

Figure 3. Program Operation ...................................... 16

Chip Erase Command Sequence ......................... 16

Sector Erase Command Sequence ...................... 16

Figure 4. Erase Operation........................................... 17

Command Definitions ........................................... 18

Table 5. Am29SL400C Command Definitions ............18

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 19

DQ7: Data# Polling ............................................... 19

Figure 5. Data# Polling Algorithm ............................... 19

RY/BY#: Ready/Busy# ......................................... 19

DQ6: Toggle Bit I .................................................. 20

DQ2: Toggle Bit II ................................................. 20

Reading Toggle Bits DQ6/DQ2 ............................ 20

Figure 6. Toggle Bit Algorithm..................................... 21

DQ5: Exceeded Timing Limits .............................. 21

DQ3: Sector Erase Timer ..................................... 21

Table 6. Write Operation Status ..................................22

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 23

Figure 7. Maximum Negative Overshoot Waveform ... 23

Figure 8. Maximum Positive Overshoot Waveform ..... 23

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 9. ICC1 Current vs. Time (Showing Active and Au-

tomatic Sleep Currents)............................................... 25

Figure 10. Typical ICC1 vs. Frequency ........................ 25

Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 11. Test Setup.................................................. 26

Table 7. Test Specifications ........................................26

Key to Switching Waveforms ................................ 26

Figure 12. Input Waveforms

and Measurement Levels ............................................ 26

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 13. Read Operations Timings .......................... 27

Figure 14. RESET# Timings........................................ 28

Figure 15. BYTE# Timings for Read Operations......... 29

Figure 16. BYTE# Timings for Write Operations ......... 29

Figure 17. Program Operation Timings ....................... 31

Figure 18. Chip/Sector Erase Operation Timings........ 32

Figure 19. Data# Polling Timings

(During Embedded Algorithms) ................................... 33

Figure 20. Toggle Bit Timings

(During Embedded Algorithms) ................................... 33

Figure 21. DQ2 vs. DQ6.............................................. 34

Temporary Sector Unprotect ................................ 34

Figure 22. Temporary Sector Unprotect

Timing Diagram ........................................................... 34

Figure 23. Sector Protect/Unprotect Timing Diagram . 35

Figure 24. Alternate CE# Controlled

Write Operation Timings.............................................. 37

Erase and Programming Performance . . . . . . . . 38

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 39

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 40

TS048—48-Pin Standard TSOP .......................... 40

FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA)

6 x 8 mm Package ................................................ 41

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 42

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