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UPD17708 Folha de dados(PDF) 148 Page - Renesas Technology Corp

Nome de Peças UPD17708
Descrição Electrónicos  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
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UPD17708 Folha de dados(HTML) 148 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
146
Figure 12-21. Configuration of Interrupt Edge Selection Register (2/2)
Caution
The external input is delayed about 100 ns.
Note that an interrupt request signal may be issued at the time when the interrupt request issuance edge is
switched by the interrupt edge selection flags (IEG0 through IEG4).
As indicated in the table 12-3, for example, if the IEG0 flag is set to “1” (falling edge), the high level is input
from the INT0 pin and the IEG0 flag is reset to “0”, the edge detection circuit judges that the rising edge is input
and an interrupt request is issued.
Name
Flag symbol
b3
0
b2
I
E
G
2
b1
I
E
G
1
b0
I
E
G
0
Address
1FH
Read/Write
R/W
Interrupt edge selection 2
Power-ON reset
WDT&SP reset
CE reset
Clock stop
00
0
0
0
0
0
0
1
Rising edge
Falling edge
Selects input edge to issue interrupt request (INT0 pin)
Rising edge
Falling edge
Selects input edge to issue interrupt request (INT1 pin)
Rising edge
Falling edge
Selects input edge to issue interrupt request (INT2 pin)
Fixed to “0”
0
1
0
1
Retained
Retained



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