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ST7LUS5 Folha de dados(PDF) 44 Page - STMicroelectronics |
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ST7LUS5 Folha de dados(HTML) 44 Page - STMicroelectronics |
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44 / 124 page ![]() Power saving modes ST7LUS5, ST7LU05, ST7LU09 44/124 8 Power saving modes 8.1 Introduction To give a large measure of flexibility to the application in terms of power consumption, four main power saving modes are implemented in the ST7 (see Figure 16): ● Slow ● Wait (and Slow Wait) ● Active Halt ● Auto Wake-up from Halt (AWUFH) ● Halt After a RESET the normal operating mode is selected by default (RUN mode). This mode drives the device (CPU and embedded peripherals) by means of a master clock which is based on the main oscillator frequency (fOSC). From RUN mode, the different power saving modes may be selected by setting the relevant register bits or by calling the specific ST7 software instruction whose action depends on the oscillator status. Figure 16. Power saving mode transitions 8.2 Slow mode This mode has two targets: ● To reduce power consumption by decreasing the internal clock in the device ● To adapt the internal clock frequency (fCPU) to the available supply voltage. Slow mode is controlled by the SMS bit in the MCCSR register which enables or disables Slow mode. POWER CONSUMPTION WAIT SLOW RUN ACTIVE HALT High Low SLOW WAIT HALT |
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