SPC58EG80C3 datasheet(57/139 Pages) STMICROELECTRONICS

57 / 139 page

DS11758 Rev 6

57/139

SPC584Gx, SPC58EGx, SPC58NGx

Electrical characteristics

DNL(6)

Differential non-linearity

std. mode

Standard frequency mode,

VDD_HV_ADV > 4 V

VDD_HV_ADR_S > 4 V

–1

LSB

(10b)

High frequency mode,

VDD_HV_ADV > 4 V

VDD_HV_ADR_S > 4 V

–1

1. Minimum ADC sample times are dependent on adequate charge transfer from the external driving circuit to the internal

sample capacitor. The time constant of the entire circuit must allow the sampling capacitor to charge within 1/2 LSB within

the sampling window. Refer to Figure 8 for models of the internal ADC circuit, and the values to use in external RC sizing

and calculating the sampling window duration.

2. IADCREFH and IADCREFL are independent from ADC clock frequency. It depends on conversion rate: consumption is driven

by the transfer of charge between internal capacitances during the conversion.

3. Current parameter values are for a single ADC.

4. All channels of all SAR-ADC12bit and SAR-ADC10bit are impacted with same degradation, independently from the ADC

and the channel subject to current injection.

5. TUE is granted with injection current within the range defined in Table 26, for parameters classified as T and D.

6. DNL is granted with injection current within the range defined in Table 26, for parameters classified as T and D.

Table 28. ADC-Comparator electrical specification (continued)

Symbol

Parameter

Conditions

Value

Unit

Min

Max

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