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L9396 Folha de dados(PDF) 25 Page - STMicroelectronics |
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L9396 Folha de dados(HTML) 25 Page - STMicroelectronics |
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25 / 109 page ![]() DS12539 Rev 6 25/109 L9396 Power supply 108 Note: In particular corner conditions, the VPREREG output could be affected by transient overvoltage (clamped to VBST) once the Wake-up input is lowered. In these conditions the integrated high-side regulator FET is kept OFF through a passive switch OFF, that may lead the output to bounce. For this reason, it is not recommended the VPREREG to supply eventual external circuits, unless properly protected. All electrical characteristics are valid for the following conditions unless otherwise noted: -40 °C ≤ Tj ≤ +175 °C; 6 ≤ VBST ≤ 19 V. Table 10. VPREREG buck regulator Symbol Parameter Conditions Min Typ Max Unit VPREREG_H Output Voltage VBST > 8.2 V 6.984 7.2 7.416 V VPREREG_L Output Voltage VBST > 7.5 V 6.305 6.5 6.695 V VPREREG_UV Under voltage threshold - 5.05 5.21 5.32 V tflt_VPREREG_UV Under voltage filter time -- 12 - µs VPREREG_OV Over voltage threshold - VPREREG_x +5% - VPREREG_ x +10% V tflt_VPREREG_OV Over voltage filter time -- 12 - µs IVPREREG_HI Output load current SYS_CONFIG_1[9]=1 0.01 - 1 A IVPREREG_LO Output load current SYS_CONFIG_1[9]=0 (default) 0.01 - 0.5 A LVPREREG Buck inductor - 17.6 22 26.4 µH CVPREREG Output capacitor - 14.3 22 29.7 µF dVSR_ac Line Transient Response All line, load; dt = 10 µs VBST> VPREREG(Typ)+3V -8% - 8% % dVLR_ac Load Transient Response All line, load; dt = 10 µs VBST> VPREREG(Typ)+3V -8% - 8% % IOC_VPREREG_HI High Over current detection SYS_CONFIG_1[9]=1 1.8 - 3 A IOC_VPREREG_LO Low Over current detection SYS_CONFIG_1[9]=0 (default) 0.9 - 1.6 A - High side ton -- - 40 ns - High side toff -- - 40 ns Fvpreregsw Operating Frequency -- fOSCINT/ 34 (0.470) -MHz RDSon High side Rds_ON Tj = 25 °C - - 0.4 Ω Tj = 175 °C - - 0.44 Ω |
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