ADIN2111BCPZ-R7 datasheet(73/125 Pages) AD

73 / 125 page

Data Sheet

ADIN2111

REGISTERS

analog.com

Rev. 0 | 73 of 125

P1 MAC Rx Frame Size Register

Address: 0x90, Reset: 0x00000000, Name: P1_RX_FSIZE

Table 93. Bit Descriptions for P1_RX_FSIZE

Bits

Bit Name

Description

Reset

Access

[31:11]

RESERVED

Reserved.

0x0

[10:0]

P1_RX_FRM_SIZE

Receive Frame Size. The size of the frame at the head of the Rx FIFO in bytes. The size includes the

appended header. When using the generic SPI protocol this register must be read before reading a

frame from a receive FIFO via P1_RX.

0x0

P1 MAC Receive Register

Address: 0x91, Reset: 0x00000000, Name: P1_RX

The receive FIFO is read via this register. It is possible to burst read data from the Rx FIFO over SPI.

Table 94. Bit Descriptions for P1_RX

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_RDR

Receive Data Register. This field is only used with the generic SPI protocol. Reading this register returns the four

bytes at the top of the receive FIFO and pops these four bytes from the FIFO. The upper 8 bits contain the first

byte, the next 8 bits contain the second byte, and so on. When a complete frame is read out, no further data is

returned from the P1 Rx FIFOs until the P1_RX_FRM_SIZE register is read first. Only used with the generic SPI

protocol.

0x0

P1 Rx Frame Count Register

Address: 0xA0, Reset: 0x00000000, Name: P1_RX_FRM_CNT

Table 95. Bit Descriptions for P1_RX_FRM_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_RX_FRM_CNT

Rx Frame Count. This counter increments for received good and bad frames.

0x0

P1 Rx Broadcast Frame Count Register

Address: 0xA1, Reset: 0x00000000, Name: P1_RX_BCAST_CNT

Table 96. Bit Descriptions for P1_RX_BCAST_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_RX_BCAST_CNT

Rx Broadcast Frame Count. This counter increments for received good and bad frames.

0x0

P1 Rx Multicast Frame Count Register

Address: 0xA2, Reset: 0x00000000, Name: P1_RX_MCAST_CNT

Table 97. Bit Descriptions for P1_RX_MCAST_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_RX_MCAST_CNT

Rx Multicast Frame Count. This counter increments for received good and bad frames.

0x0

P1 Rx Unicast Frame Count Register

Address: 0xA3, Reset: 0x00000000, Name: P1_RX_UCAST_CNT

ADIN2111BCPZ-R7 Folha de dados(PDF) 73 Page - Analog Devices

ADIN2111BCPZ-R7 Folha de dados(HTML) 73 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL