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ZLP12840 Folha de dados(PDF) 14 Page - Zilog, Inc. |
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ZLP12840 Folha de dados(HTML) 14 Page - Zilog, Inc. |
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14 / 58 page  PS024406-0106 P R E L I M I N A R Y Features ZLP12840 OTP MCU Product Specification 3 Low voltage detection and high voltage detection flags Programmable Watch-Dog Timer/Power-On Reset circuits Two on-board analog comparators with independent reference voltages and program- mable interrupt polarity One-time programmable EPROM option bits (On/Off) Port 0 pins 03 pull-up transistors Port 0 pins 47 pull-up transistors Port 2 pins 07 pull-up transistors EPROM Protection Watch-dog timer enabled at Power-on reset All signals with an overline, , are active Low. For example, B/W, in which WORD is active Low, and B/W, in which BYTE is active Low. Power connections use the conventional descriptions listed in Table 2. Table 2. Power Connections Connection Circuit Device PowerVCC VDD Ground GNDVSS Note: |
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