IMX6SDLCEC datasheet(42/169 Pages) NXP

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i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018

NXP Semiconductors

Electrical Characteristics

4.6.3.2

DDR3/DDR3L Mode I/O DC Parameters

The parameters in Table 25 are guaranteed per the operating ranges in Table 8, unless otherwise noted. For

details on supported DDR memory configurations, see Section 4.9.4, “Multi-Mode DDR Controller

(MMDC).

4.6.4

RGMII I/O 2.5V I/O DC Electrical Parameters

The RGMII interface complies with the RGMII standard version 1.3. The parameters in Table 26 are

guaranteed per the operating ranges in Table 8, unless otherwise noted.

3 The single-ended signals need to be within the respective limits (Vih(dc) max, Vil(dc) min) for single-ended signals as well as

the limitations for overshoot and undershoot.

Table 25. DDR3/DDR3L I/O DC Electrical Characteristics1

1 Note that the JEDEC DDR3 specification (JESD79_3D) supersedes any specification in this document.

Parameters

Symbol

Test Conditions

Min

Max

Unit

High-level output voltage

VOH

Ioh= -0.1mA

Voh (for DSE=001)

0.8

× OVDD2

2 OVDD – I/O power supply (1.425 V–1.575 V for DDR3 and 1.283 V–1.45 V for DDR3L)

—V

Low-level output voltage

VOL

Iol= 0.1mA

Vol (for DSE=001)

—0.2

× OVDD

High-level output voltage

VOH

Ioh= -1mA

Voh (for all except DSE=001)

0.8

× OVDD

—

Low-level output voltage

VOL

Iol= 1mA

Vol (for all except DSE=001)

—0.2

× OVDD

Input Reference Voltage

Vref

—

0.49

× OVDD

0.51

× OVDD

DC High-Level input voltage

Vih_DC

—

Vref3+0.1

3 Vref – DDR3/DDR3L external reference voltage.

OVDD

DC Low-Level input voltage

Vil_DC

—

OVSS

Vref-0.1

Differential Input Logic High

Vih_diff

—

0.2

See Note4

4 The single-ended signals need to be within the respective limits (Vih(dc) max, Vil(dc) min) for single-ended signals as well as

the limitations for overshoot and undershoot.

Differential Input Logic Low

Vil_diff

—

See Note3

-0.2

Termination Voltage

Vtt

Vtt tracking OVDD/2

0.49

× OVDD

0.51

× OVDD

Pull-up/Pull-down Impedance Mismatch

Mmpupd

—

-10

240

Ω unit calibration resolution

Rres

—

Keeper Circuit Resistance

Rkeep

—

105

165

Input current (no pull-up/down)

Iin

VI = 0,VI = OVDD

-2.9

2.9

μA

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