K32L2AX datasheet(83/96 Pages) NXP

83 / 96 page

MSB IN

BIT 6 . . . 1

MSB OUT

SLAVE LSB OUT

SLAVE

see

note

(INPUT)

(CPOL=0)

SPSCK

(CPOL=1)

(INPUT)

MOSI

(INPUT)

MISO

(OUTPUT)

NOTE: Not defined

LSB IN

BIT 6 . . . 1

Figure 25. LPSPI slave mode timing (CPHA = 1)

8.8.5 LPI2C

Table 52. LPI2C specifications

Symbol

Description

Min.

Max.

Unit

Notes

fSCL

SCL clock frequency

Standard mode (Sm)

100

kHz

Fast mode (Fm)

400

1, 2

Fast mode Plus (Fm+)

1000

1, 3

Ultra Fast mode (UFm)

5000

1, 4

High speed mode (Hs-mode)

3400

1, 5

1. See General switching specifications, measured at room temperature.

2. Measured with the maximum bus loading of 400pF at 3.3V VDD with pull-up Rp = 580Ω on normal drive pins or 350Ω

on high drive pins, and at 1.8V VDD with Rp = 880Ω. For all other cases, select appropriate Rp per I2C Bus

Specification and the pin drive capability.

3. Fm+ is only supported on high drive pin with high drive enabled. It is measured with the maximum bus loading of

400pF at 3.3V VDD with Rp = 350Ω. For all other cases, select appropriate Rp per I2C Bus Specification and the pin

drive capability.

4. UFm is only supported on high drive pin with high drive enabled and push-pull output only mode. It is measured at

3.3V VDD with the maximum bus loading of 400pF. For 1.8V VDD, the maximum speed is 4Mbps.

5. Hs-mode is only supported in slave mode and on the high drive pins with high drive enabled.

8.8.6 LPUART

See General switching specifications.

Peripheral operating requirements and behaviors

K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021

NXP Semiconductors

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