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UCD3138064RMHT Folha de dados(PDF) 16 Page - Texas Instruments

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Nome de Peças UCD3138064RMHT
Descrição Electrónicos  UCD3138064 Highly Integrated Digital Controller for Isolated Power With 64-kB Program Flash Memory
PDF  104 Pages
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

UCD3138064RMHT Folha de dados(HTML) 16 Page - Texas Instruments

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V33A = V33D = V33DIO = 3.3 V; 1μF from BP18 to DGND, TJ = –40 °C to 125 °C (unless otherwise noted)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
DNL(5)
0.06
0.12
LSB
Offset
–5.5
19.5
mV
Reference DAC buffered output load(7)
–0.5
1
mA
Buffer offset (–0.5 mA)
4.6
8.3
mV
Buffer offset (1.0 mA)
–0.05
17
mV
Output Range (–0.5 mA)
0.2
2.5
V
Output Range (1.0 mA)
0
2.5
V
(1)
DPWM outputs are low after reset. Other GPIO pins are configured as inputs after reset.
(2)
On the 40 pin package V33DIO is connected to V33D internally.
(3)
The maximum total current, IOHmax and IOLmax for all outputs combined, should not exceed 12 mA to hold the maximum voltage
drop specified. Maximum sink current per pin = –6 mA at VOL; maximum source current per pin = 6 mA at VOH.
(4)
Time from close of error ADC sample window to time when digitally calculated control effort (duty cycle) is available. This delay, which
has no variation associated with it, must be accounted for when calculating the system dynamic response.
(5)
Characterized by design and not production tested.
(6)
Ambient temperature offset value should be used from the TEMPSENCTRL register to meet accuracy.
(7)
Available from reference DACs for comparators D, E, F and G.
8.6 Timing Characteristics
V33A = V33D = V33DIO = 3.3 V; 1 μF from BP18 to DGND, TJ = –40 to 125 °C (unless otherwise noted)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
EADC DAC
τ
Settling Time
From 10 to 90%
250
ns
ADC12
ADC single sample conversion time(1)
ADC_SAMPLING_SEL= 6 or 0
3.9
μs
SYSTEM PERFORMANCE
tWD
Watchdog time out resolution
Total time is: tWD x (WDCTRL.PERIOD+1)
14.6
17
20.5
ms
Time to disable DPWM output based on
active FAULT pin signal
High level on FAULT pin
70
ns
Retention period of flash content (data
retention and program)
TJ = 25 °C
100
years
Program time to erase one page or block
in data flash or program flash
20
ms
Program time to write one word in data
flash or program flash
30
µs
Sync-in/sync-out pulse width
Sync pin
256
ns
Flash Write
20
μs
POWER ON RESET AND BROWN OUT (V33D PIN, SEE Figure 8-3)
tPOR
Time delay after Power is good or RESET*
relinquished
1
ms
tEXC1
The time it takes from the device to exit
a reset state and begin executing program
flash bank 1 (32 kB).(1)
IRESET goes from a low state to a high state.
This is approximately equivalent to toggling the
external reset pin from low to high state.
9.5
ms
tEXC2
The time it takes from the device to exit
a reset state and begin executing program
flash bank 2 (32 kB).(1)
IRESET goes from a low state to a high state.
This is approximately equivalent to toggling the
external reset pin from low to high state.
19
ms
tEXCT
The time it takes from the device to exit
a reset state and begin executing the total
program flash (64 kB).(1)
IRESET goes from a low state to a high state.
This is approximately equivalent to toggling the
external reset pin from low to high state.
19
ms
TEMPERATURE SENSOR(1)
tON
Turn on time / settling time of sensor
100
μs
UCD3138064
SLUSB72D – MARCH 2013 – REVISED APRIL 2021
www.ti.com
16
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Product Folder Links: UCD3138064



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