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AM652X Folha de dados(PDF) 235 Page - Texas Instruments

Nome de Peças AM652X
Descrição Electrónicos  Processors Silicon Revision 1.0
PDF  277 Pages
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

AM652X Folha de dados(HTML) 235 Page - Texas Instruments

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MII_TXCLK
PMIT2
PMIT3
PMIT1
PMIT4
PMIT4
SPRS91x_TIMING_PRU_MII_RT_05
MII_RXCLK
PMIR2
PMIR3
PMIR1
SPRS91x_TIMING_PRU_MII_RT_04
235
AM6548, AM6528, AM6546
AM6526, AM6527
www.ti.com
SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019
Submit Documentation Feedback
Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527
Specifications
Copyright © 2017–2019, Texas Instruments Incorporated
Table 5-112. PRU_ICSSG MII_RT Timing Requirements – MII_RXCLK
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PMIR1
tc(RX_CLK)
Cycle time, RX_CLK
10 Mbps
399.96
400.04
ns
100 Mbps
39.996
40.004
ns
PMIR2
tw(RX_CLKH)
Pulse Duration, RX_CLK High
10 Mbps
140
260
ns
100 Mbps
14
26
ns
PMIR3
tw(RX_CLKL)
Pulse Duration, RX_CLK Low
10 Mbps
140
260
ns
100 Mbps
14
26
ns
Figure 5-117. PRU_ICSSG MII_RXCLK Timing
Table 5-113. PRU_ICSSG MII_RT Timing Requirements – MII_TXCLK
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PMIT1
tc(TX_CLK)
Cycle time, TX_CLK
10 Mbps
399.96
400.04
ns
100 Mbps
39.996
40.004
ns
PMIT2
tw(TX_CLKH)
Pulse Duration, TX_CLK High
10 Mbps
140
260
ns
100 Mbps
14
26
ns
PMIT3
tw(TX_CLKL)
Pulse Duration, TX_CLK Low
10 Mbps
140
260
ns
100 Mbps
14
26
ns
PMIT4
tt(TX_CLK)
Transition time, TX_CLK
10 Mbps
5
ns
100 Mbps
5
ns
Figure 5-118. PRU_ICSSG MII_TXCLK Timing
Table 5-114. PRU_ICSSG MII_RT Timing Requirements – MII_RXD[3:0], MII_RXDV, and MII_RXER
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PMIR4
tsu(RXD-RX_CLK)
Setup time, RXD[3:0] valid before RX_CLK
10 Mbps
8
ns
tsu(RX_DV-RX_CLK)
Setup time, RX_DV valid before RX_CLK
8
ns
tsu(RX_ER-RX_CLK)
Setup time, RX_ER valid before RX_CLK
8
ns
tsu(RXD-RX_CLK)
Setup time, RXD[3:0] valid before RX_CLK
100
Mbps
8
ns
tsu(RX_DV-RX_CLK)
Setup time, RX_DV valid before RX_CLK
8
ns
tsu(RX_ER-RX_CLK)
Setup time, RX_ER valid before RX_CLK
8
ns



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