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STM32MP151C Folha de dados(PDF) 125 Page - STMicroelectronics |
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STM32MP151C Folha de dados(HTML) 125 Page - STMicroelectronics |
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125 / 253 page ![]() DS12501 Rev 3 125/253 STM32MP151C/F Electrical characteristics 232 6.3.1 General operating conditions 6.3.2 Operating conditions at power-up / power-down Subject to general operating conditions. VIN I/O Input voltage TTxa I/O -0.3 - VDD+0.3 V OTG_VBUS I/O -0.3 - 6 DDR I/O -0.3 - VDDQ_DDR USB HS I/O -1 - 5.25 All I/O except TTxa -0.3 - See(12) TJ Junction temperature range Suffix 1 version -20 - 105 oC Suffix 3 version -40 - 125 1. Once nRST is released functionality is guaranteed down to VBOR falling edge max. 2. Min VDD is 2.25 V when REG1V8 is used BYPASS_REG1V8 = 0. 3. Should be connected to same power supply voltage as VDD. 4. It is recommended to connect VDD_PLL and VDD_PLL2 to same power supply as VDD. 5. Only for STM32MP151Fxx1 devices 6. 1.25 V is the max allowed voltage, however LPLV-Stop mode is only relevant for VDDCORE up to 0.95 V. In LPLV-Stop mode, if VDDQ_DDR is not shutdown, to avoid overconsumption on VDDQ_DDR, the DDR memory must be put in SelfRefresh and DDR PHY must be set in retention mode (setting bit DDRRETEN: DDR retention enable of PWR control register 3 (PWR_CR3)). 7. DAC cannot be used with VREF below 1.8 V. 8. ADC cannot be used with VREF below 2 V and VDDA above 2 V. 9. Depending on package selected, either VDD3V3_USBFS and VDD3V3_USBHS or only VDD3V3_USB are available. 10. For operation with voltage higher than Min (VDD, VDDA, VDD3V3_USBFS) +0.3 V, the internal Pull-up and Pull-Down resistors must be disabled. 11. Independent from any other supply. 12. Min(VDD, VDDA, VDD3V3_USBFS) +3.6 V < 5.5 V. This formula has to be applied on power supplies related to the IO structure described by the pin definition table. Table 13. General operating conditions (continued) Symbol Parameter Operating conditions Min. Typ Max. Unit |
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