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STM32L4A6RG Folha de dados(PDF) 61 Page - STMicroelectronics |
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STM32L4A6RG Folha de dados(HTML) 61 Page - STMicroelectronics |
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61 / 282 page ![]() DS11584 Rev 8 61/282 STM32L4A6xG Functional overview 61 3.43 Development support 3.43.1 Serial wire JTAG debug port (SWJ-DP) The Arm® SWJ-DP interface is embedded, and is a combined JTAG and serial wire debug port that enables either a serial wire debug or a JTAG probe to be connected to the target. Debug is performed using 2 pins only instead of 5 required by the JTAG (JTAG pins could be re-use as GPIO with alternate function): the JTAG TMS and TCK pins are shared with SWDIO and SWCLK, respectively, and a specific sequence on the TMS pin is used to switch between JTAG-DP and SW-DP. 3.43.2 Embedded Trace Macrocell™ The Arm® Embedded Trace Macrocell™ provides a greater visibility of the instruction and data flow inside the CPU core by streaming compressed data at a very high rate from the STM32L4A6xG through a small number of ETM pins to an external hardware trace port analyzer (TPA) device. Real-time instruction and data flow activity be recorded and then formatted for display on the host computer that runs the debugger software. TPA hardware is commercially available from common development tool vendors. The Embedded Trace Macrocell™ operates with third party debugger software tools. |
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