ADP5072ACBZ-R7 datasheet(19/24 Pages) AD

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Data Sheet

ADP5072

Rev. 0 | Page 19 of 24

When the ADP5072 inverting regulator is operated in CCM at

duty cycles greater than 50%, slope compensation is required to

stabilize the current mode loop. For stable current mode operation,

ensure that the selected inductance is equal to or greater than

the minimum calculated inductance, LMIN2, for the application

parameters in the following equation:

0.13

0.16

)

MIN2

L2 L

DUTY



−



−



(µH)

Table 11 suggests a series of inductors to use with the ADP5072

inverting regulator.

LOOP COMPENSATION

The ADP5072 uses external components to compensate the

regulator loop, allowing the optimization of the loop dynamics

for a given application.

Boost Regulator

The boost converter produces an undesirable right half plane

zero in the regulation feedback loop. This feedback loop requires

compensating the regulator such that the crossover frequency

occurs well below the frequency of the right half plane zero. The

right half plane zero is determined by the following equation:

)

()

LOAD1

DUTY

f RHP

−

where:

fZ1(RHP) is the right half plane zero frequency.

RLOAD1 is the equivalent load resistance or the output voltage

divided by the load current.

DIODE1

POS

DIODE1

DUTY



−+

= 





where VDIODE1 is the forward voltage drop of the Schottky

diode (D1).

To stabilize the regulator, ensure that the regulator crossover

frequency is less than or equal to one-tenth of the right half

plane zero frequency.

The boost regulator loop gain is

FB1

VL1

OUT1

COMP1

CS1

OUT1

POS

||Z

××

where:

AVL1 is the loop gain.

VFB1 is the feedback regulation voltage

VPOS is the regulated positive output voltage.

VIN is the input voltage.

gM1 is the error amplifier transconductance gain.

ROUT1 is the output impedance of the error amplifier and is 33 MΩ.

ZCOMP1 is the impedance of the series resistor/capacitor (RC)

network from COMP1 to AGND.

gCS1 is the current sense transconductance gain (the inductor

current divided by the voltage at COMP1), which is internally

set by the ADP5072 and is 6.25 A/V.

ZOUT1 is the impedance of the load in parallel with the output

capacitor.

To determine the crossover frequency (fC1), it is important to

note that, at that frequency, the compensation impedance (ZCOMP1)

is dominated by a resistor (RC1), and the output impedance (ZOUT1)

is dominated by the impedance of an output capacitor (COUT1).

Therefore, when solving for the crossover frequency, the equation

(by definition of the crossover frequency) is simplified to

FB1

VL1

CS1

POS

OUT1

πf

××

where fC1 is the crossover frequency.

To solve for RC1, use the following equation:

OUT1

POS

FB1

CS1

π ××

where gCS1 = 6.25 A/V.

Using typical values for VFB1 and GM1 results in

4188

)

OUT1

POS

××

For improved accuracy, it is recommended to use the value of the

output capacitance, COUT1, expected for the dc bias conditions

under which it operates in the calculation for RC1.

After the compensation resistor is known, set the zero formed

by the compensation capacitor and resistor, CC1 and RC1, to one-

fourth of the crossover frequency, or

πf

××

where CC1 is the compensation capacitor value.

ERROR

AMPLIFIER

REF1

gM1

FB1

COMP1

RC1

CC1

Figure 44. Compensation Components

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