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ADP5072ACBZ-R7 Folha de dados(PDF) 5 Page - Analog Devices |
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ADP5072ACBZ-R7 Folha de dados(HTML) 5 Page - Analog Devices |
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5 / 24 page ![]() Data Sheet ADP5072 Rev. 0 | Page 5 of 24 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating PVIN, AVIN −0.3 V to +6V SW1 −0.3 V to +40 V SW2 PVIN − 40 V to PVIN + 0.3 V PGND, AGND −0.3 V to +0.3 V EN1, EN2, FB1, FB2, SYNC, −0.3 V to +6 V COMP1, COMP2, SLEW, SS, SEQ, VREF −0.3 V to AVIN + 0.3 V Operating Junction Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. θJA is the natural convection junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. θJC is the junction to case thermal resistance. ψJT is the junction to case thermal characterization parameter. Table 4. Thermal Resistance Package Type θJA θJC ΨJT Unit CB-20-141, 2 50 0.54 0.13 C/W 1 θJA and ΨJT are based on a 4-layer printed circuit board (PCB) (two signal and two power planes) with nine thermal vias connecting the exposed pad to the ground plane as recommended in the Layout Considerations section. θJC is measured at the top of the package and is independent of the PCB. The ΨJT value is more appropriate for calculating junction to case temperature in the application. 2 The thermal resistance values specified in Table 4 are simulated based on JEDEC specifications, unless specified otherwise, and must be used in compliance with JESD51-12. ESD CAUTION |
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