IL

Load

PFM

PWM

TOFF longer with

lower current

12

TPS61372

SLVSEE7 – JUNE 2018

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Device Functional Modes (continued)

8.4.2 Auto PFM Mode

The TPS61372 integrates a power save mode with pulse frequency modulation ( PFM ) at the light load ( set the

mode pin low logic or floating ). When a light load condition occurs, the COMP pin voltage naturally decreases,

reducing the peak current delivered by the TPS61372. When the COMP pin voltage further reaches the

threshold, the output of the error amplifier is clamped at this threshold and does not go down any more. If the

load is further lowered, the output voltage of TPS61372 will exceed the nominal voltage and the device will skip

Figure 9 shows the working principle of the PFM operation. The Auto PFM mode reduces the switching losses

and improves efficiency at light load condition by reducing the average switching frequency.

Figure 9. Auto PFM Operation Behavior

8.4.3 Forced PWM Mode

In the Forced PWM mode, the TPS61372 keeps the switching frequency being constant across the whole load

range. When the load current decreases, the output of the internal error amplifier decreases as well to lower the

inductor peak current and delivers less power. The high-side FET is not turned off even if the current through the

FET goes negative to keep the switching frequency be the same as that of the heavy load.

8.4.4 Mode Selectable

There is a mode pin to configure the TPS61372 into two different operation modes. The device works in the Auto

PFM mode when pulling the mode pin to low or floating and in forced PWM mode when mode pin is high

8.5 Device Behavior Description

8.5.1 Adaptive Off Time with Peak Current Control Topology

The TPS61372 uses the peak current mode with the adaptive off time control based topology. At the beginning of

each cycle, the low-side FET turns on and the inductor current ramps up to reach a peak current determined by

the output of the error amplifier (EA). When the peak current pre-set value determined by the EA's output trips,

the low-side FET turns off. As long as the low-side FET turns off, the high-side FET turns on after a short delay

Figure 10 is adopted to predict the required off time of the switching cycle. The high-side FET is not turned off

until the predicted off-time expires. After a short dead time, the low-side FET turns on again and the switching

cycle is repeated.

Figure 10 shows the details of the off time predication of low-side FET, there is a current source (determined by

Equation 1 ,Equation 2, Equation 3: