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LTC6652 Folha de dados(PDF) 40 Page - Linear Technology

Nome de Peças LTC6652
Descrição Electrónicos  18-Bit, 1Msps, 8-Channel SAR ADC with 100dB SNR
PDF  50 Pages
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Fabricante Electrônico  LINER [Linear Technology]
Página de início  http://www.linear.com
Logo LINER - Linear Technology

LTC6652 Folha de dados(HTML) 40 Page - Linear Technology

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LTC2373-18
40
237318f
For more information www.linear.com/LTC2373-18
Sleep Mode
The LTC2373-18 automatically naps and starts acquiring
the input once a conversion has completed. Only the ADC
core powers down in nap mode. As a result, the auto nap
feature provides limited power savings. To obtain greater
power savings, the LTC2373-18 provides a sleep mode.
Duringsleepmode,theentirepartispowereddownexcept
for a small standby current resulting in a 300μW power
dissipation. To enter sleep mode, toggle CNV twice with no
intervening rising edge on SCK as shown in Figure 28. The
part will enter sleep mode on the falling edge of BUSY from
the last conversion initiated. Once in sleep mode, a rising
edge on SCK will wake the part up. Upon emerging from
sleep mode, wait tWAKE ms before initiating a conversion
to allow the reference and reference buffer to wake-up and
charge the bypass capacitors at REFIN and REFBUF. The
serial data I/O bus is enabled or disabled by RDL during
sleep mode. Sleep mode does not affect the state of the
sequencer memory or memory pointer.
TiMing DiagraMs
Figure 28. Sleep Mode Timing Diagram
CNV
RDL = DON’T CARE
SDI = DON’T CARE
BUSY
SCK
tCNVH
tCONV
CONVERT
NAP
SLEEP
tBUSYLH
CONVERT
CONVERT
NAP
tCONV
237318 F28
CNV
RDL = DON’T CARE
SDI = DON’T CARE
BUSY
SCK
tCNVH
tCONV
CONVERT
SLEEP
tBUSYLH
CONVERT
NAP
tWAKE
tWAKE



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