5222-DS00-R datasheet(52/76 Pages) BOARDCOM

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BCM5222

Preliminary Data Sheet

7/20/04

Broadcom Corporation

Page 40

Auxiliary Mode Register

Document 5222-DS02-405-R

AUXILIARY MODE REGISTER

Table 24 shows the bit descriptions for the Auxiliary Mode register.

LINK LED DISABLE

When set to 1, disables the Link LED output pin. When 0, Link LED output is enabled.

BLOCK TXEN MODE

When this mode is enabled, short IPGs of 1, 2, 3 or 4 TXC cycles results in the insertion of two IDLEs before the beginning

of the next packet’s JK symbols.

AUXILIARY MULTIPLE PHY REGISTER

Table 24: Auxiliary Mode Register (Address 11101b, 29d, 1Dh)

Bit

Name

R/W

Description

Default

15:5

Reserved

Ignore when read

Reserved

R/W

Write as 0, Ignore when Read

Link LED Disable

R/W

1 = Disable link LED output

0 = Enable link LED output

Reserved

Ignore when read

Block TXEN Mode

R/W

1 = Enable block TXEN mode

0 = Disable block TXEN mode

Reserved

Ignore when read

Table 25: Auxiliary Multiple PHY Register (Address 30d, 1Eh)

Bit

Name

R/W

Description

Default

HCD_TX_FDX

1 = Auto-negotiation result is 100BASE-TX full-duplex

HCD_T4

1 = Auto-negotiation result is 100BASE-T4

HCD_TX

1 = Auto-negotiation result is 100BASE-TX

HCD_10BASE-T_FDX

1 = Auto-negotiation result is 10BASE-T full-duplex

HCD_10BASE-T

1 = Auto-negotiation result is 10BASE-T

10:9

Reserved

Ignore when read

Restart Auto-Negotiation

R/W

(SC)

1 = Restart auto-negotiation process

0 = (No effect)

Auto-Negotiation Complete

1 = Auto-negotiation process completed

0 = Auto-negotiation process not completed

Acknowledge Complete

1 = Auto-negotiation acknowledge completed

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL & LH Clear after

read operation. Use default values of reserved bit(s) when writing to reserved bit(s).

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