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BCM5222

Preliminary Data Sheet

7/20/04

Broadcom Corporation

Page 32

100BASE-TX False Carrier Sense Counter

Document 5222-DS02-405-R

100BASE-TX FALSE CARRIER SENSE COUNTER

FALSE CARRIER SENSE COUNTER [7:0]

This counter increments each time the BCM5222 detects a false carrier on the receive input. This counter automatically

clears itself when read. When the counter reaches its maximum value, FFh, it stops counting False Carrier Sense Errors

until cleared.

AUXILIARY CONTROL/STATUS REGISTER

The Auxiliary Control/Status register bit descriptions are shown in Table 19.

Table 18: 100BASE-TX False Carrier Sense Counter (Address 19d, 13h)

Bit

Name

R/W

Description

Default

15:8

Reserved

Ignore these bits

00h

7:0

False Carrier Sense Counter

[7:0]

R/W

Number of false carrier sense events since last read

00h

Table 19: Auxiliary Control/Status Register (Address 11000b, 24d, 18h)

Bit

Name

R/W

Description

Default

Jabber Disable

R/W

1 = Jabber function disabled

0 = Jabber function enabled

Force Link

R/W

1 = Force link pass

0 = Normal link operation

13:9

Reserved

Ignore when read

000000

10M Transmit Power Mode

R/W

1 = 10BASE-T Full Power Mode

0 = 10BASE-T Low Power Mode

7:6

HSQ : LSQ

R/W

These two bits define the squelch mode of the

10BASE-T Carrier Sense mechanism

00 = Normal Squelch

01 = Low Squelch

10 = High Squelch

11 = Not Allowed

5:4

Edge Rate [1:0]

R/W

00 = 1 ns

01 = 2 ns

10 = 3 ns

11 = 4 ns

Auto-Negotiation Indication

1 = Auto-negotiation activated

0 = Speed forced manually

ANEN Pin

Force 100/10 Indication

1 = Speed forced to 100BASE-TX

0 = Speed forced to 10BASE-T

Speed Indication

1 = 100BASE-TX

0 = 10BASE-T

Full-Duplex Indication

1 = Full-duplex active

0 = Full-duplex not active

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