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ADG3249BRJ-R2 Folha de dados(PDF) 2 Page - Analog Devices

Nome de Peças ADG3249BRJ-R2
Descrição Electrónicos  2.5 V/3.3 V, 2:1 Multiplexer/ Demultiplexer Bus Switch
PDF  12 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADG3249BRJ-R2 Folha de dados(HTML) 2 Page - Analog Devices

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REV. 0
–2–
ADG3249–SPECIFICATIONS1
B Version
Parameter
Symbol
Conditions
Min
Typ
2
Max
Unit
DC ELECTRICAL CHARACTERISTICS
Input High Voltage
VINH
VCC = 2.7 V to 3.6 V
2.0
V
VINH
VCC = 2.3 V to 2.7 V
1.7
V
Input Low Voltage
VINL
VCC = 2.7 V to 3.6 V
0.8
V
VINL
VCC = 2.3 V to 2.7 V
0.7
V
Input Leakage Current
II
±0.01
± 1
µA
OFF State Leakage Current
IOZ
0
≤ A, B ≤ V
CC
±0.01
± 1
µA
ON State Leakage Current
0
≤ A, B ≤ V
CC
±0.01
±1
µA
Maximum Pass Voltage
VP
VA/VB = VCC = SEL = 3.3 V, IO = –5
µA
2.0
2.5
2.9
V
VA/VB = VCC = SEL = 2.5 V, IO= –5
µA1.5
1.82.1
V
VA/VB = VCC = 3.3 V, SEL = 0 V, IO = –5
µA
1.5
1.8
2.1
V
CAPACITANCE
3
A Port Off Capacitance
CA OFF
f = 1 MHz;
EN = V
CC
3.5
pF
B Port Off Capacitance
CB OFF
f = 1 MHz;
EN = V
CC
4.5
pF
A, B Port On Capacitance
CA, CB ON
f = 1 MHz
8.5
pF
Control Input Capacitance
CIN, CSEL
f = 1 MHz
4
pF
CEN
f = 1 MHz
6.5
pF
SWITCHING CHARACTERISTICS
3
Propagation Delay A to B or B to A, tPD
4
tPHL, tPLH
CL = 50 pF, VCC = SEL = 3 V
0.225
ns
Propagation Delay Matching
5
5ps
Bus Enable Time
EN to A or B6
tPZH, tPZL
VCC = 3.0 V to 3.6 V; SEL = VCC
1
3.5
4.8
ns
Bus Disable Time
EN to A or B6
tPHZ, tPLZ
VCC = 3.0 V to 3.6 V; SEL = VCC
1
5.5
8.2
ns
Bus Enable Time
EN to A or B6
tPZH, tPZL
VCC = 3.0 V to 3.6 V; SEL = 0 V
1
3.2
4.5
ns
Bus Disable Time
EN to A or B6
tPHZ, tPLZ
VCC = 3.0 V to 3.6 V; SEL = 0 V
1
4.5
7.7
ns
Bus Enable Time
EN to A or B6
tPZH, tPZL
VCC = 2.3 V to 2.7 V; SEL = VCC
1
3.5
4.6
ns
Bus Disable Time
EN to A or B6
tPHZ, tPLZ
VCC = 2.3 V to 2.7 V; SEL = VCC
14
5.8
ns
Break-before-Make Time
tBBM
RL = 510
Ω, C
L = 50 pF
5
10
ns
Transition Time
tTRANS
RL = 510
Ω, C
L = 50 pF; SEL = VCC
16
29
ns
RL = 510
Ω, C
L = 50 pF; SEL = 0 V
15
22
ns
Maximum Data Rate
VCC = SEL = 3.3 V; VA/VB = 2 V
1.244
Gbps
Channel Jitter
VCC = SEL = 3.3 V; VA/VB = 2 V
45
ps p-p
DIGITAL SWITCH
On Resistance
RON
VCC = 3 V, SEL = VCC, VA = 0 V, IBA = 8 mA
4.5
8
VCC = 3 V, SEL = VCC, VA = 1.7 V, IBA = 8 mA
12
28
VCC = 2.3 V, SEL = VCC, VA = 0 V, IBA = 8 mA
5
9
VCC = 2.3 V, SEL = VCC, VA = 1 V, IBA = 8 mA
9
18
VCC = 3 V, SEL = 0 V VA = 0 V, IBA = 8 mA
5
8
VCC = 3 V, SEL = 0 V, VA = 1 V, IBA = 8 mA
12
On Resistance Matching
RON
VCC = 3 V, SEL = VCC, VA = 0 V, IA = 8 mA
0.1
0.5
VCC = 3 V, SEL = 0 V, VA = 0 V, IA = 8 mA
0.1
0.5
POWER REQUIREMENTS
VCC
2.3
3.6
V
Quiescent Power Supply Current
ICC
Digital Inputs = 0 V or VCC; SEL = VCC
0.01
1
µA
Digital Inputs = 0 V or VCC; SEL = 0 V
0.1
0.2
mA
Increase in ICC per Input
7
ICC
VCC = 3.6 V, EN = 3.0 V; SEL = VCC; IN = VCC
0.15
8
µA
NOTES
1Temperature range is as follows: B Version: –40
°C to +85°C.
2Typical values are at 25
°C, unless otherwise stated.
3Guaranteed by design, not subject to production test.
4The digital switch contributes no propagation delay other than the RC delay of the typical R
ON of the switch and the load capacitance when driven by an ideal voltage
source. Since the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay
of the digital switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
5Propagation delay matching between channels is calculated from the on resistance matching and load capacitance of 50 pF.
6See Timing Measurement Information section.
7This current applies to the control pin
EN only. The A and B ports contribute no significant ac or dc currents as they transition.
Specifications subject to change without notice.
(VCC = 2.3 V to 3.6 V, GND = 0 V, all specifications TMIN to TMAX,
unless otherwise noted.)



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