CS49530X datasheet(17/37 Pages) CIRRUS

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CS4953xx Data Sheet

32-bit Audio Decoder DSP Family

DS705F2

5.12 Switching Characteristics — Serial Control Port - I2C Slave Mode

Figure 5. Serial Control Port - I2C Slave Mode Timing

Parameter

Symbol

Min

Typical

Max

Units

SCP_CLK frequency1

1. The specification fiicck indicates the maximum speed of the hardware. The system designer should be aware that

the actual maximum speed of the communication port may be limited by the firmware application. Flow control

using the SCP_BSY pin should be implemented to prevent overflow of the input data buffer.

fiicck

—

400

kHz

SCP_CLK low time

tiicckl

1.25

—

µs

SCP_CLK high time

tiicckh

1.25

—

µs

SCP_SCK rising to SCP_SDA rising or falling for START or

STOP condition

tiicckcmd

1.25

—

µs

START condition to SCP_CLK falling

tiicstscl

1.25

—

µs

SCP_CLK falling to STOP condition

tiicstp

2.5

—

µs

Bus free time between STOP and START conditions

tiicbft

3—

—

µs

Setup time SCP_SDA input valid to SCP_CLK rising

tiicsu

100

—

Hold time SCP_SDA input after SCP_CLK falling2

2. This parameter is measured from the ViL level at the falling edge of the clock.

tiich

0—

—

SCP_CLK low to SCP_SDA out valid

tiicdov

——

SCP_CLK falling to SCP_IRQ rising

tiicirqh

——

3*DCLKP + 40

NAK condition to SCP_IRQ low

tiicirql

—3*DCLKP + 20

—

SCP_CLK rising to SCB_BSY low

tiicbsyl

—3*DCLKP + 20

—

SCP_BSY

SCP_CLK

SCP_SDA

SCP_IRQ

tiicckl

tiicckh

tiicsu

tiich

R/W

ACK

LSB

tiicirqh

tiicirql

ACK

MSB

tiicstp

tiiccbsyl

tiicdov

tiicbft

tiicstscl

tiicckcmd

fiicck

tiicckcmd

tiicf

tiicr

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