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WM8524 Folha de dados(PDF) 13 Page - Cirrus Logic

Nome de Peças WM8524
Descrição Electrónicos  24-bit 192kHz Stereo DAC with 2Vrms
PDF  25 Pages
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Fabricante Electrônico  CIRRUS [Cirrus Logic]
Página de início  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8524 Folha de dados(HTML) 13 Page - Cirrus Logic

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Production Data
WM8524
w
PD, Rev 4.1, October 2011
13
AUDIO DATA FORMATS
In Right Justified mode, the LSB is available on the last rising edge of BCLK before a LRCLK
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each LRCLK transition.
Figure 6 Right Justified Audio Interface (24-bit word length)
In Left Justified mode, the MSB is available on the first rising edge of BCLK following a LRCLK
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition.
Figure 7 Left Justified Audio Interface (assuming n-bit word length)
In I
2S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition.
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.



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