R5F564MLGDLC datasheet(67/228 Pages) RENESAS

Nome de Peças	R5F564MLGDLC

Descrição Electrónicos	120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory

PDF	228 Pages

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Fabricante Electrônico	RENESAS [Renesas Technology Corp]

Página de início	http://www.renesas.com

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67 / 228 page

R01DS0173EJ0110 Rev.1.10

Page 67 of 228

Oct 24, 2016

RX64M Group

2. CPU

2.3

Accumulator

The accumulator (ACC0 or ACC1) is a 72-bit register used for DSP instructions. The accumulator is handled as a 96-bit

register for reading and writing. At this time, when bits 95 to 72 of the accumulator are read, the value where the value of

bit 71 is sign extended is read. Writing to bits 95 to 72 of the accumulator is ignored. ACC0 is also used for the multiply

and multiply-and-accumulate instructions; EMUL, EMULU, FMUL, MUL, and RMPA, in which case the prior value in

ACC0 is modified by execution of the instruction.

Use the MVTACGU, MVTACHI, and MVTACLO instructions for writing to the accumulator. The MVTACGU,

MVTACHI, and MVTACLO instructions write data to bits 95 to 64, the higher-order 32 bits (bits 63 to 32), and the

lower-order 32 bits (bits 31 to 0), respectively.

Use the MVFACGU, MVFACHI, MVFACMI, and MVFACLO instructions for reading data from the accumulator. The

MVFACGU, MVFACHI, MVFACMI, and MVFACLO instructions read data from the guard bits (bits 95 to 64), higher-

order 32 bits (bits 63 to 32), the middle 32 bits (bits 47 to 16), and the lower-order 32 bits (bits 31 to 0), respectively.

R5F564MLGDLC Folha de dados(PDF) 67 Page - Renesas Technology Corp