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STM32L053 Folha de dados(PDF) 94 Page - STMicroelectronics |
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STM32L053 Folha de dados(HTML) 94 Page - STMicroelectronics |
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94 / 132 page ![]() Electrical characteristics STM32L053x6 STM32L053x8 94/132 DocID025844 Rev 7 Figure 27. Typical connection diagram using the ADC 1. Refer to Table 62: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 28 or Figure 29, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed as close as possible to the chip. Figure 28. Power supply and reference decoupling (VREF+ not connected to VDDA) |
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