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STM32F401CD Folha de dados(PDF) 63 Page - STMicroelectronics

Nome de Peças STM32F401CD
Descrição Electrónicos  Clock, reset and supply management
PDF  135 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F401CD Folha de dados(HTML) 63 Page - STMicroelectronics

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STM32F401xD STM32F401xE
Electrical characteristics
114
6.3.3
Operating conditions at power-up/power-down (regulator ON)
Subject to general operating conditions for TA.
Table 17. Operating conditions at power-up / power-down (regulator ON)
6.3.4
Operating conditions at power-up / power-down (regulator OFF)
Subject to general operating conditions for TA.
Note:
This feature is only available for UFBGA100 package.
Symbol
Parameter
Min
Max
Unit
tVDD
VDD rise time rate
20
∞
µs/V
VDD fall time rate
20
∞
Table 18. Operating conditions at power-up / power-down (regulator OFF)(1)
1. To reset the internal logic at power-down, a reset must be applied on pin PA0 when VDD reach below
1.08 V.
Symbol
Parameter
Conditions
Min
Max
Unit
tVDD
VDD rise time rate
Power-up
20
∞
µs/V
VDD fall time rate
Power-down
20
∞
tVCAP
VCAP_1 and VCAP_2 rise time rate Power-up
20
∞
VCAP_1 and VCAP_2 fall time rate
Power-down
20
∞



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