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STM8L101x2 Folha de dados(PDF) 23 Page - STMicroelectronics |
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STM8L101x2 Folha de dados(HTML) 23 Page - STMicroelectronics |
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23 / 88 page ![]() DocID15275 Rev 16 23/88 STM8L101x1 STM8L101x2 STM8L101x3 Memory and register map 33 5 Memory and register map Figure 8. Memory map 1. Table 5 lists the boundary addresses for each memory size. The top of the stack is at the RAM end address. 2. Refer to Table 7 for an overview of hardware register mapping, to Table 6 for details on I/O port hardware registers, and to Table 8 for information on CPU/SWIM/debug module controller registers. |
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