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SPC560P50L5 Folha de dados(PDF) 18 Page - STMicroelectronics

Nome de Peças SPC560P50L5
Descrição Electrónicos  Fail safe protection
PDF  112 Pages
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPC560P50L5 Folha de dados(HTML) 18 Page - STMicroelectronics

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Introduction
SPC560P44Lx, SPC560P50Lx
18/112
Doc ID 14723 Rev 9
1.5.13
System timer module (STM)
The STM module implements these features:
●
One 32-bit up counter with 8-bit prescaler
●
Four 32-bit compare channels
●
Independent interrupt source for each channel
●
Counter can be stopped in debug mode
1.5.14
Software watchdog timer (SWT)
The SWT has the following features:
●
32-bit time-out register to set the time-out period
●
Programmable selection of system or oscillator clock for timer operation
●
Programmable selection of window mode or regular servicing
●
Programmable selection of reset or interrupt on an initial time-out
●
Master access protection
●
Hard and soft configuration lock bits
●
Reset configuration inputs allow timer to be enabled out of reset
1.5.15
Fault collection unit (FCU)
The FCU provides an independent fault reporting mechanism even if the CPU is
malfunctioning.
The FCU module has the following features:
●
FCU status register reporting the device status
●
Continuous monitoring of critical fault signals
●
User selection of critical signals from different fault sources inside the device
●
Critical fault events trigger 2 external pins (user selected signal protocol) that can be
used externally to reset the device and/or other circuitry (for example, safety relay or
FlexRay transceiver)
●
Faults are latched into a register
1.5.16
System integration unit – Lite (SIUL)
The SPC560P44Lx, SPC560P50Lx SIUL controls MCU pad configuration, external
interrupt, general purpose I/O (GPIO), and internal peripheral multiplexing.
The pad configuration block controls the static electrical characteristics of I/O pins. The
GPIO block provides uniform and discrete input/output control of the I/O pins of the MCU.



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