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LSM6DS0 Folha de dados(PDF) 32 Page - STMicroelectronics |
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LSM6DS0 Folha de dados(HTML) 32 Page - STMicroelectronics |
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32 / 59 page ![]() Application hints LSM6DS0 32/59 DocID025604 Rev 3 5 Application hints Figure 20. LSM6DS0 electrical connections 5.1 External capacitors The device core is supplied through the Vdd line. Power supply decoupling capacitors (C2, C3 = 100 nF ceramic, C4 = 10 μF Al) should be placed as near as possible to the supply pin of the device (common design practice). The functionality of the device and the measured acceleration/angular rate data is selectable and accessible through the SPI/I2C interface. 10nF(16V) *C1 GND * C1 must guarantee 1 nF value under 11 V bias condition (TOP VIEW) 1 5 RES INT RES Vdd RES Cap 100 nF GND GND 10 μF C3 C4 Vdd GND Vdd_IO GND 100 nF C2 9 13 |
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