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LP2994 Folha de dados(PDF) 9 Page - National Semiconductor (TI) |
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LP2994 Folha de dados(HTML) 9 Page - National Semiconductor (TI) |
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9 / 15 page ![]() Component Selection (Continued) dielectric types have poor capacitance characteristics as a function of voltage and temperature. Because of the typically low value of capacitance it is recommended to use ceramic capacitors in parallel with another capacitor such as an aluminum electrolytic. A dielectric of X5R or better is recom- mended for all ceramic capacitors. Hybrid - Several hybrid capacitors such as OS-CON and SP are available from several manufacturers. These offer a large capacitance while maintaining a low ESR. These are the best solution when size and performance are critical, although their cost is typically higher than other capacitors. Thermal Dissipation Since the LP2994 is a linear regulator any current flow from V TT will result in internal power dissipation generating heat. To prevent damaging the part from exceeding the maximum allowable junction temperature, care should be taken to derate the part dependent on the maximum expected ambi- ent temperature and power dissipation. The maximum allow- able internal temperature rise (T Rmax) can be calculated given the maximum ambient temperature (T Amax)ofthe application and the maximum allowable junction temperature (T Jmax). T Rmax =TJmax −TAmax From this equation, the maximum power dissipation (P D)of the part can be calculated: P Dmax =TRmax / θJA The θ JA of the LP2994 will be dependent on several vari- ables: the package used; the thickness of copper; the num- ber of vias and the airflow. For instance, the θ JA of the SO-8 is 163˚C/W with the package mounted to a standard 8x4 2-layer board with 1oz. copper, no airflow, and 0.5W dissi- pation at room temperature. This value can be reduced to 151.2˚C/W by changing to a 3x4 board with 2 oz. copper that is the JEDEC standard. Figure 3 shows how the θ JA varies with airflow for the two boards mentioned. Additional improvements can be made by the judicious use of vias to connect the part and dissipate heat to an internal ground plane. Using larger traces and more copper on the top side of the board can also help. With careful layout, it is possible to reduce the θ JA further than the nominal values shown in Figure 3. Optimizing the θ JA and placing the LP2994 in a section of a board exposed to lower ambient temperature allows the part to operate with higher power dissipation. The internal power dissipation can be calculated by summing the three main sources of loss: output current at V TT, either sinking or sourcing, and quiescent current at AVIN and V DDQ. During the active state (when Shutdown is not held low) the total internal power dissipation can be calculated from the follow- ing equations: P D =PAVIN +PVDDQ +PVTT where, P AVIN =IAVIN xVAVIN P VDDQ =VVDDQ xIVDDQ =VVDDQ 2 xR VDDQ To calculate the maximum power dissipation at V TT, both sinking and sourcing current conditions at V TT need to be examined. Although only one equation will add into the total, V TT cannot source and sink current simultaneously. P VTT =VVTT xILOAD (Sinking) or P VTT =(VPVIN -VVTT)xILOAD (Sourcing) The power dissipation of the LP2994 can also be calculated during the shutdown state. During this condition the output V TT will tri-state, therefore that term in the power equation will disappear as it cannot sink or source any current (leak- age is negligible). The only losses during shutdown will be the reduced quiescent current at AVIN and the constant impedance that is seen at the V DDQ pin. P D =PAVIN +PVDDQ Where, P AVIN =IAVIN xVAVIN P VDDQ =VVDDQ xIVDDQ =VVDDQ 2 xR VDDQ 20045928 FIGURE 3. θ JA vs Airflow www.national.com 9 |
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