A3980KLP datasheet(5/18 Pages) ALLEGRO

5 / 18 page

Automotive DMOS Microstepping Driver

with Translator

A3980

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

ELECTRICAL CHARACTERISTICS at TJ = –40°C to +150ºC, VBB = 14 V, VDD = 3.0 to 5.5 V (unless otherwise noted)

Characteristics

Symbol

Test Conditions

Min.

Typ.1

Max.

Units

Output Drivers

Load Supply Voltage Range

VBB

Driving

Operating

Sleep mode

–

VOVB

Output Leakage Current2

IDSS

VOUT = VBB

VOUT = 0 V

–

< 1.0

–20

μA

Output-On Resistance

RDSON

Source driver, IOUT = –1 A, TA<25ºC

Sink driver, IOUT = 1 A, TA<25ºC

–

0.51

0.45

0.86

0.65



Source driver, IOUT = –1 A, TA<125ºC

Sink driver, IOUT = 1 A, TA<125ºC

–

0.87

0.72

1.06

0.83



Body Diode Forward Voltage

Source diode, IF = –1 A

Sink diode, IF = 1 A

––

1.4

Motor Supply Current

IBB

fPWM < 50 kHz

Operating, outputs disabled

Sleep mode

––

μA

Logic Supply Current

IDD

fPWM < 50 kHz

Outputs off

Sleep mode

––

μA

Logic Interface

Logic Supply Voltage Range

VDD

Operating

3.0

5.0

5.5

Input Low Voltage

VIL

––

–

0.3 VDD

Input High Voltage

VIH

–

0.7 VDD

––

Input Hysteresis

VIHYS

–

200

300

500

Input Current2

IIN

–

–20

< ±1

μA

Output Low Voltage

VOL

IO = 3 mA

––

0.4

Output High Voltage

VOH

IO = –200 μA

2.8

––

STEP Pin Low

tSTPL

–

––

μs

STEP Pin High

tSTPH

–

––

μs

Setup Time for Input Change to STEP

tSU

MS1, MS2, DIR

200

––

Hold Time for Input Change from STEP

MS1, MS2, DIR

200

––

Wake-Up Time from SLEEP

tEN

––

–

1ms

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