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VREF Folha de dados(PDF) 15 Page - Asahi Kasei Microsystems |
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VREF Folha de dados(HTML) 15 Page - Asahi Kasei Microsystems |
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15 / 19 page ![]() ASAHI KASEI [AK5352] 0155-E-00 1997/1 - 15 - SYSTEM DESIGN Figure 5 shows the system connection diagram. Figure 6 shows the input buffer circuit. An evaluation board[AKD5351/2] is available which demonstrates the optimum layout, power supply arrangement and measurement results. Figure 5 . System Connection Diagram Example NOTE: +5V Analog should be powered the same time or earlier than +5V Digital. Figure 6 . Input Buffer Circuit Example |
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