LMF90 datasheet(11/22 Pages) NSC

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10 Definition of Terms (Continued)

Passband Gain

the notch filter’s gain for signal frequen-

cies near dc or fCLK 2 The passband gain of a notch filter is

also called ‘‘HON’’ For the LMF90 the passband gain is

nominally 0 dB

Passband Ripple

the variation in gain within the filter’s

passband

Stopband

for a notch filter the range of frequencies for

which the attenuation is at least Amin (fS1 to fS2)in Figure

1 )

Stop Frequency

one of the two frequencies (fS1 and fS2)

at the edges of the notch’s stopband

Stopband Width (SBW)

the difference in frequency be-

tween the two stopband edges (fS2–fS1)

TLH10354 – 5

FIGURE 1 General Form of Notch Response

20 Applications Information

21 FUNCTIONAL DESCRIPTION

The LMF90 uses switched-capacitor techniques to realize a

fourth-order elliptic notch transfer function with 025 dB

passband ripple No external components other than supply

bypass capacitors and a clock (or crystal) are required

As is evident from the block diagram the analog signal path

consists of a fourth-order bandpass filter and a summing

amplifier The analog input signal is applied to the input of

the bandpass filter and to one of the summing amplifier

inputs The bandpass filter’s output drives the other sum-

ming amplifier input The output of the summing amplifier is

the difference between the input signal and the bandpass

output and has a notch filter characteristic Notch width and

depth are controlled by the dc programming voltages ap-

plied to two pins (1 and 10) and the center frequency is

proportional to the clock frequency which may be generat-

ed externally or internally with the aid of an external crystal

The clock-to-center-frequency ratio can be one of three dif-

ferent values and is selected by the voltage on a three-level

logic input (pin 2)

The clock signal passes through a digital frequency divider

circuit that can divide the clock frequency by any of three

different factors before it reaches the filters This divider can

also be disabled if desired Pin 7 enables and disables the

frequency divider and also configures the clock inputs for

operation with an external CMOS or TTL clock or with the

internal oscillator circuit

TLH10354 – 6

FIGURE 2 LMF90 Block Diagram

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