WM8753LEBSLASHRV datasheet(13/87 Pages) WOLFSON

Nome de Peças	WM8753LEB/RV

Descrição Electrónicos	HI FI AND TELEPHONY DUAL CODEC

PDF	87 Pages

Scroll/Zoom	100%

Fabricante Electrônico	WOLFSON [Wolfson Microelectronics plc]

Página de início	http://www.wolfsonmicro.com

Logo

13 / 87 page

WM8753L

Advanced Information

AI Rev 3.1 June 2004

SIGNAL TIMING REQUIREMENTS

SYSTEM CLOCK TIMING

MCLK

MCLKL

MCLKH

MCLKY

Figure 1 System Clock Timing Requirements

Test Conditions

CLKDIV2=0, DCVDD = 1.42V, DBVDD = AVDD = SPKRVDD = PLLVDD = 3.3V, DGND = AGND = PLLGND = 0V, TA = +25

oC,

Slave Mode fs = 48kHz, MCLK = 384fs, 24-bit data, unless otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

System Clock Timing Information

MCLK System clock cycle time

TMCLKY

MCLK duty cycle

TMCLKDS

60:40

40:60

Test Conditions

CLKDIV2=1, DCVDD = 1.42V, DBVDD = AVDD = SPKRVDD = PLLVDD = 3.3V, DGND = AGND = PLLGND = 0V, TA = +25

oC,

Slave Mode fs = 48kHz, MCLK = 384fs, 24-bit data, unless otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

System Clock Timing Information

MCLK System clock pulse width high

TMCLKL

MCLK System clock pulse width low

TMCLKH

MCLK System clock cycle time

TMCLKY

MODE/GPIO3 AND CSB/GPIO5 LATCH ON POWERUP TIMING

MODE/GPIO3

AVDD/DCVDD

Power-on-Reset

(internal)

CSB/GPIO5

puhold

pusetup

DBVDD

dbpu

WM8753LEB/RV Folha de dados(PDF) 13 Page - Wolfson Microelectronics plc

WM8753LEB/RV Folha de dados(HTML) 13 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87

Folha de dados Download

Ligação URL