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WM8737L Folha de dados(PDF) 18 Page - Wolfson Microelectronics plc |
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WM8737L Folha de dados(HTML) 18 Page - Wolfson Microelectronics plc |
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18 / 38 page ![]() WM8737L Preliminary Technical Data w AI Rev 3.0 May 2004 18 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:0 LINVOL[7:0] C3h ( 0dB ) Left Channel Input Volume Control 00000000: MUTE 00000001: -97dB 00000010: -96.5dB … 11000011: 0dB … 11111111: +30dB R0 (00h) Left Channel PGA 8 LVU 0 Left PGA volume update 0: Store LINVOL in left intermediate latch but do not update left gain. 1: Update both PGA gains simultaneously (left gain = LINVOL, right gain = right intermediate latch). 7:0 RINVOL[7:0] C3h ( 0dB ) Right Channel Input Volume Control. Same as LINVOL. R1 (01h) Right Channel PGA 8 RVU 0 Right PGA volume update 0: Store RINVOL in right intermediate latch but do not update right gain. 1: Update both PGA gains simultaneously (right gain = RINVOL, left gain = left intermediate latch). Table 7 PGA Software Control ZERO-CROSS DETECTION To avoid zipper or click noises, it is preferable to change the microphone preamplifier and PGA gains only when the input signal is at zero. The WM8737L has built-in zero-cross detectors to achieve this. This function is enabled by setting the LMZC, LPZC, RMZC and RPZC bits. The zero-cross detection feature includes a programmable time-out, selected by writing to LZCTO[1:0] and RZCTO[1:0]. If no zero crossing occurs within the time-out period then the WM8737L changes the PGA or microphone preamplifier gains when the time-out elapses. |
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